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memory: tegra: Add clients used by DRM in Tegra234

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Add entries for VIC, NVDEC, NVENC, NVJPG memory controller
clients into the 'tegra_234_mc_clients' table.

Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20230621134400.23070-3-sumitg@nvidia.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Sumit Gupta 2023-06-21 19:13:58 +05:30 committed by Krzysztof Kozlowski
parent 6d0c4aa516
commit b18e525990
1 changed files with 120 additions and 0 deletions
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120
drivers/memory/tegra/tegra234.c
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@ -29,6 +29,18 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0xac,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVENCSRD,
.name = "nvencsrd",
.bpmp_id = TEGRA_ICC_BPMP_NVENC,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVENC,
.regs = {
.sid = {
.override = 0xe0,
.security = 0xe4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_PCIE6AR,
.name = "pcie6ar",
@ -65,6 +77,18 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0x154,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVENCSWR,
.name = "nvencswr",
.bpmp_id = TEGRA_ICC_BPMP_NVENC,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVENC,
.regs = {
.sid = {
.override = 0x158,
.security = 0x15c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_DLA0RDB,
.name = "dla0rdb",
@ -357,6 +381,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0x33c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_VICSRD,
.name = "vicsrd",
.bpmp_id = TEGRA_ICC_BPMP_VIC,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_VIC,
.regs = {
.sid = {
.override = 0x360,
.security = 0x364,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_VICSWR,
.name = "vicswr",
.bpmp_id = TEGRA_ICC_BPMP_VIC,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_VIC,
.regs = {
.sid = {
.override = 0x368,
.security = 0x36c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_DLA1RDB1,
.name = "dla0rdb1",
@ -401,6 +449,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0x38c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVDECSRD,
.name = "nvdecsrd",
.bpmp_id = TEGRA_ICC_BPMP_NVDEC,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVDEC,
.regs = {
.sid = {
.override = 0x3c0,
.security = 0x3c4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVDECSWR,
.name = "nvdecswr",
.bpmp_id = TEGRA_ICC_BPMP_NVDEC,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVDEC,
.regs = {
.sid = {
.override = 0x3c8,
.security = 0x3cc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_APER,
.name = "aper",
@ -437,6 +509,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0x3e4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVJPGSRD,
.name = "nvjpgsrd",
.bpmp_id = TEGRA_ICC_BPMP_NVJPG_0,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVJPG,
.regs = {
.sid = {
.override = 0x3f0,
.security = 0x3f4,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVJPGSWR,
.name = "nvjpgswr",
.bpmp_id = TEGRA_ICC_BPMP_NVJPG_0,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVJPG,
.regs = {
.sid = {
.override = 0x3f8,
.security = 0x3fc,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVDISPLAYR,
.name = "nvdisplayr",
@ -781,6 +877,30 @@ static const struct tegra_mc_client tegra234_mc_clients[] = {
.security = 0x77c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVJPG1SRD,
.name = "nvjpg1srd",
.bpmp_id = TEGRA_ICC_BPMP_NVJPG_1,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVJPG1,
.regs = {
.sid = {
.override = 0x918,
.security = 0x91c,
},
},
}, {
.id = TEGRA234_MEMORY_CLIENT_NVJPG1SWR,
.name = "nvjpg1swr",
.bpmp_id = TEGRA_ICC_BPMP_NVJPG_1,
.type = TEGRA_ICC_NISO,
.sid = TEGRA234_SID_NVJPG1,
.regs = {
.sid = {
.override = 0x920,
.security = 0x924,
},
},
}, {
.id = TEGRA_ICC_MC_CPU_CLUSTER0,
.name = "sw_cluster0",