drivers: net: xgene-v2: Fix port reset
Fixed port reset sequence by adding ECC init. Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -38,10 +38,24 @@ u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset)
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int xge_port_reset(struct net_device *ndev)
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int xge_port_reset(struct net_device *ndev)
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{
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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struct xge_pdata *pdata = netdev_priv(ndev);
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struct device *dev = &pdata->pdev->dev;
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u32 data, wait = 10;
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xge_wr_csr(pdata, ENET_SRST, 0x3);
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xge_wr_csr(pdata, ENET_CLKEN, 0x3);
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xge_wr_csr(pdata, ENET_SRST, 0x2);
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xge_wr_csr(pdata, ENET_SRST, 0xf);
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xge_wr_csr(pdata, ENET_SRST, 0x0);
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xge_wr_csr(pdata, ENET_SRST, 0);
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xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 1);
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xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 0);
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do {
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usleep_range(100, 110);
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data = xge_rd_csr(pdata, BLOCK_MEM_RDY);
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} while (data != MEM_RDY && wait--);
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if (data != MEM_RDY) {
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dev_err(dev, "ECC init failed: %x\n", data);
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return -ETIMEDOUT;
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}
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xge_wr_csr(pdata, ENET_SHIM, DEVM_ARAUX_COH | DEVM_AWAUX_COH);
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xge_wr_csr(pdata, ENET_SHIM, DEVM_ARAUX_COH | DEVM_AWAUX_COH);
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@ -59,13 +73,11 @@ static void xge_traffic_resume(struct net_device *ndev)
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xge_wr_csr(pdata, RX_DV_GATE_REG, 1);
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xge_wr_csr(pdata, RX_DV_GATE_REG, 1);
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}
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}
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int xge_port_init(struct net_device *ndev)
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void xge_port_init(struct net_device *ndev)
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{
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{
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struct xge_pdata *pdata = netdev_priv(ndev);
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struct xge_pdata *pdata = netdev_priv(ndev);
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pdata->phy_speed = SPEED_1000;
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pdata->phy_speed = SPEED_1000;
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xge_mac_init(pdata);
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xge_mac_init(pdata);
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xge_traffic_resume(ndev);
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xge_traffic_resume(ndev);
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return 0;
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}
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}
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@ -28,6 +28,7 @@
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#define CFG_MEM_RAM_SHUTDOWN 0xd070
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#define CFG_MEM_RAM_SHUTDOWN 0xd070
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#define BLOCK_MEM_RDY 0xd074
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#define BLOCK_MEM_RDY 0xd074
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#define MEM_RDY 0xffffffff
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#define DEVM_ARAUX_COH BIT(19)
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#define DEVM_ARAUX_COH BIT(19)
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#define DEVM_AWAUX_COH BIT(3)
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#define DEVM_AWAUX_COH BIT(3)
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@ -39,5 +40,6 @@
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void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val);
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void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val);
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u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset);
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u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset);
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int xge_port_reset(struct net_device *ndev);
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int xge_port_reset(struct net_device *ndev);
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void xge_port_init(struct net_device *ndev);
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#endif /* __XGENE_ENET_V2_ENET__H__ */
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#endif /* __XGENE_ENET_V2_ENET__H__ */
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@ -105,7 +105,6 @@ void xge_mac_set_speed(struct xge_pdata *pdata);
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void xge_mac_enable(struct xge_pdata *pdata);
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void xge_mac_enable(struct xge_pdata *pdata);
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void xge_mac_disable(struct xge_pdata *pdata);
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void xge_mac_disable(struct xge_pdata *pdata);
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void xge_mac_init(struct xge_pdata *pdata);
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void xge_mac_init(struct xge_pdata *pdata);
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int xge_port_init(struct net_device *ndev);
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void xge_mac_set_station_addr(struct xge_pdata *pdata);
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void xge_mac_set_station_addr(struct xge_pdata *pdata);
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#endif /* __XGENE_ENET_V2_MAC_H__ */
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#endif /* __XGENE_ENET_V2_MAC_H__ */
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