i2c: rk3x: reword according to newest specification
Change the wording of this driver wrt. the newest I2C v7 and SMBus 3.2 specifications and replace "master/slave" with more appropriate terms. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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@ -28,8 +28,8 @@
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/* Register Map */
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#define REG_CON 0x00 /* control register */
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#define REG_CLKDIV 0x04 /* clock divisor register */
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#define REG_MRXADDR 0x08 /* slave address for REGISTER_TX */
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#define REG_MRXRADDR 0x0c /* slave register address for REGISTER_TX */
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#define REG_MRXADDR 0x08 /* target address for REGISTER_TX */
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#define REG_MRXRADDR 0x0c /* target register address for REGISTER_TX */
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#define REG_MTXCNT 0x10 /* number of bytes to be transmitted */
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#define REG_MRXCNT 0x14 /* number of bytes to be received */
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#define REG_IEN 0x18 /* interrupt enable */
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@ -68,8 +68,8 @@ enum {
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/* REG_IEN/REG_IPD bits */
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#define REG_INT_BTF BIT(0) /* a byte was transmitted */
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#define REG_INT_BRF BIT(1) /* a byte was received */
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#define REG_INT_MBTF BIT(2) /* master data transmit finished */
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#define REG_INT_MBRF BIT(3) /* master data receive finished */
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#define REG_INT_MBTF BIT(2) /* controller data transmit finished */
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#define REG_INT_MBRF BIT(3) /* controller data receive finished */
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#define REG_INT_START BIT(4) /* START condition generated */
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#define REG_INT_STOP BIT(5) /* STOP condition generated */
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#define REG_INT_NAKRCV BIT(6) /* NACK received */
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@ -184,7 +184,7 @@ struct rk3x_i2c_soc_data {
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* @wait: the waitqueue to wait for i2c transfer
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* @busy: the condition for the event to wait for
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* @msg: current i2c message
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* @addr: addr of i2c slave device
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* @addr: addr of i2c target device
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* @mode: mode of i2c transfer
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* @is_last_msg: flag determines whether it is the last msg in this transfer
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* @state: state of i2c transfer
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@ -979,7 +979,7 @@ static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num)
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/*
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* The I2C adapter can issue a small (len < 4) write packet before
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* reading. This speeds up SMBus-style register reads.
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* The MRXADDR/MRXRADDR hold the slave address and the slave register
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* The MRXADDR/MRXRADDR hold the target address and the target register
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* address in this case.
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*/
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@ -1016,7 +1016,7 @@ static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num)
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addr |= 1; /* set read bit */
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/*
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* We have to transmit the slave addr first. Use
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* We have to transmit the target addr first. Use
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* MOD_REGISTER_TX for that purpose.
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*/
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i2c->mode = REG_CON_MOD_REGISTER_TX;
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@ -1160,9 +1160,9 @@ static u32 rk3x_i2c_func(struct i2c_adapter *adap)
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}
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static const struct i2c_algorithm rk3x_i2c_algorithm = {
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.master_xfer = rk3x_i2c_xfer,
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.master_xfer_atomic = rk3x_i2c_xfer_polling,
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.functionality = rk3x_i2c_func,
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.xfer = rk3x_i2c_xfer,
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.xfer_atomic = rk3x_i2c_xfer_polling,
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.functionality = rk3x_i2c_func,
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};
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static const struct rk3x_i2c_soc_data rv1108_soc_data = {
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