tile PCI RC: tweak the the pcie_rc_delay support
Allow longer delays if requested, and print the info messages as we are performing the delay, not when parsing the arguments. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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@ -69,17 +69,14 @@ static int pcie_rc[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
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* a HW PCIe link-training bug. The exact delay is specified with
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* a kernel boot argument in the form of "pcie_rc_delay=T,P,S",
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* where T is the TRIO instance number, P is the port number and S is
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* the delay in seconds. If the delay is not provided, the value
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* will be DEFAULT_RC_DELAY.
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* the delay in seconds. If the argument is specified, but the delay is
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* not provided, the value will be DEFAULT_RC_DELAY.
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*/
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static int rc_delay[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
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/* Default number of seconds that the PCIe RC port probe can be delayed. */
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#define DEFAULT_RC_DELAY 10
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/* Max number of seconds that the PCIe RC port probe can be delayed. */
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#define MAX_RC_DELAY 20
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/* Array of the PCIe ports configuration info obtained from the BIB. */
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struct pcie_port_property pcie_ports[TILEGX_NUM_TRIO][TILEGX_TRIO_PCIES];
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@ -570,14 +567,9 @@ static int setup_pcie_rc_delay(char *str)
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if (!isdigit(*str))
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return -EINVAL;
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delay = simple_strtoul(str, (char **)&str, 10);
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if (delay > MAX_RC_DELAY)
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return -EINVAL;
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}
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rc_delay[trio_index][mac] = delay ? : DEFAULT_RC_DELAY;
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pr_info("Delaying PCIe RC link training for %u sec"
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" on MAC %lu on TRIO %lu\n", rc_delay[trio_index][mac],
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mac, trio_index);
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return 0;
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}
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early_param("pcie_rc_delay", setup_pcie_rc_delay);
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@ -682,12 +674,6 @@ int __init pcibios_init(void)
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continue;
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}
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/*
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* Delay the RC link training if needed.
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*/
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if (rc_delay[trio_index][mac])
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msleep(rc_delay[trio_index][mac] * 1000);
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ret = gxio_trio_force_rc_link_up(trio_context, mac);
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if (ret < 0)
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pr_err("PCI: PCIE_FORCE_LINK_UP failure, "
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@ -697,10 +683,21 @@ int __init pcibios_init(void)
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trio_index, controller->mac);
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/*
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* Wait a bit here because some EP devices take longer
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* to come up.
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* Delay the bus probe if needed.
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*/
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msleep(1000);
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if (rc_delay[trio_index][mac]) {
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pr_info("Delaying PCIe RC bus enumerating %d sec"
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" on MAC %d on TRIO %d\n",
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rc_delay[trio_index][mac], mac,
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trio_index);
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msleep(rc_delay[trio_index][mac] * 1000);
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} else {
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/*
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* Wait a bit here because some EP devices
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* take longer to come up.
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*/
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msleep(1000);
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}
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/*
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* Check for PCIe link-up status.
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