ARM: at91/dt: sama5d4: add DMA support
Add DMA controllers and device configurations. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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@ -45,6 +45,7 @@
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/at91.h>
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#include <dt-bindings/dma/at91.h>
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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@ -302,6 +303,15 @@
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#size-cells = <1>;
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ranges;
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dma1: dma-controller@f0004000 {
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compatible = "atmel,sama5d4-dma";
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reg = <0xf0004000 0x200>;
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interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
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#dma-cells = <1>;
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clocks = <&dma1_clk>;
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clock-names = "dma_clk";
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};
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ramc0: ramc@f0010000 {
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compatible = "atmel,sama5d3-ddramc";
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reg = <0xf0010000 0x200>;
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@ -309,6 +319,15 @@
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clock-names = "ddrck", "mpddr";
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};
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dma0: dma-controller@f0014000 {
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compatible = "atmel,sama5d4-dma";
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reg = <0xf0014000 0x200>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
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#dma-cells = <1>;
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clocks = <&dma0_clk>;
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clock-names = "dma_clk";
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};
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pmc: pmc@f0018000 {
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compatible = "atmel,sama5d3-pmc";
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reg = <0xf0018000 0x120>;
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@ -761,6 +780,10 @@
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compatible = "atmel,hsmci";
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reg = <0xf8000000 0x600>;
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interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(0))>;
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dma-names = "rxtx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
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status = "disabled";
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@ -776,6 +799,13 @@
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compatible = "atmel,at91rm9200-spi";
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reg = <0xf8010000 0x100>;
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interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(10))>,
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<&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(11))>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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clocks = <&spi0_clk>;
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@ -787,6 +817,13 @@
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8014000 0x4000>;
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interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(2))>,
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<&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(3))>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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#address-cells = <1>;
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@ -818,6 +855,13 @@
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8024000 0x4000>;
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interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(6))>,
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<&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(7))>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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#address-cells = <1>;
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@ -830,6 +874,10 @@
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compatible = "atmel,hsmci";
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reg = <0xfc000000 0x600>;
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interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(1))>;
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dma-names = "rxtx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
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status = "disabled";
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@ -843,6 +891,13 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfc008000 0x100>;
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interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(16))>,
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<&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(17))>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
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clocks = <&usart2_clk>;
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@ -854,6 +909,13 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfc00c000 0x100>;
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interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(18))>,
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<&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(19))>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart3>;
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clocks = <&usart3_clk>;
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@ -865,6 +927,13 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfc010000 0x100>;
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interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
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dmas = <&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(20))>,
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<&dma1
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
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| AT91_XDMAC_DT_PERID(21))>;
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dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart4>;
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clocks = <&usart4_clk>;
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