From b3df807e1fb00fa9b466b51d8ce1a1e8704928c8 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Tue, 8 Feb 2022 17:13:23 +0800 Subject: [PATCH] dt-bindings: soc: grf: add naneng combo phy register compatible Add Naneng combo phy register compatible. Acked-by: Rob Herring Signed-off-by: Johan Jonker Signed-off-by: Yifeng Zhao Tested-by: Frank Wunderlich Link: https://lore.kernel.org/r/20220208091326.12495-2-yifeng.zhao@rock-chips.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index dfebf425ca49..fe68e22efce0 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -38,6 +38,8 @@ properties: - rockchip,rk3399-grf - rockchip,rk3399-pmugrf - rockchip,rk3568-grf + - rockchip,rk3568-pipe-grf + - rockchip,rk3568-pipe-phy-grf - rockchip,rk3568-pmugrf - rockchip,rv1108-grf - rockchip,rv1108-pmugrf