KVM: x86: Track required APICv inhibits with variable, not callback
Track the per-vendor required APICv inhibits with a variable instead of calling into vendor code every time KVM wants to query the set of required inhibits. The required inhibits are a property of the vendor's virtualization architecture, i.e. are 100% static. Using a variable allows the compiler to inline the check, e.g. generate a single-uop TEST+Jcc, and thus eliminates any desire to avoid checking inhibits for performance reasons. No functional change intended. Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20230106011306.85230-32-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -76,7 +76,6 @@ KVM_X86_OP(set_nmi_mask)
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KVM_X86_OP(enable_nmi_window)
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KVM_X86_OP(enable_irq_window)
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KVM_X86_OP_OPTIONAL(update_cr8_intercept)
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KVM_X86_OP(check_apicv_inhibit_reasons)
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KVM_X86_OP(refresh_apicv_exec_ctrl)
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KVM_X86_OP_OPTIONAL(hwapic_irr_update)
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KVM_X86_OP_OPTIONAL(hwapic_isr_update)
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@ -1623,6 +1623,7 @@ struct kvm_x86_ops {
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void (*enable_irq_window)(struct kvm_vcpu *vcpu);
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void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
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bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason);
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const unsigned long required_apicv_inhibits;
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bool allow_apicv_in_x2apic_without_x2apic_virtualization;
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void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
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void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
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@ -963,25 +963,6 @@ out:
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return ret;
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}
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bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason)
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{
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ulong supported = BIT(APICV_INHIBIT_REASON_DISABLE) |
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BIT(APICV_INHIBIT_REASON_ABSENT) |
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BIT(APICV_INHIBIT_REASON_HYPERV) |
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BIT(APICV_INHIBIT_REASON_NESTED) |
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BIT(APICV_INHIBIT_REASON_IRQWIN) |
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BIT(APICV_INHIBIT_REASON_PIT_REINJ) |
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BIT(APICV_INHIBIT_REASON_BLOCKIRQ) |
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BIT(APICV_INHIBIT_REASON_SEV) |
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BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) |
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BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) |
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BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) |
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BIT(APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED);
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return supported & BIT(reason);
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}
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static inline int
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avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r)
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{
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@ -4773,8 +4773,8 @@ static struct kvm_x86_ops svm_x86_ops __initdata = {
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.update_cr8_intercept = svm_update_cr8_intercept,
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.set_virtual_apic_mode = avic_refresh_virtual_apic_mode,
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.refresh_apicv_exec_ctrl = avic_refresh_apicv_exec_ctrl,
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.check_apicv_inhibit_reasons = avic_check_apicv_inhibit_reasons,
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.apicv_post_state_restore = avic_apicv_post_state_restore,
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.required_apicv_inhibits = AVIC_REQUIRED_APICV_INHIBITS,
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.get_exit_info = svm_get_exit_info,
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@ -621,6 +621,21 @@ void svm_switch_vmcb(struct vcpu_svm *svm, struct kvm_vmcb_info *target_vmcb);
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extern struct kvm_x86_nested_ops svm_nested_ops;
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/* avic.c */
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#define AVIC_REQUIRED_APICV_INHIBITS \
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( \
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BIT(APICV_INHIBIT_REASON_DISABLE) | \
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BIT(APICV_INHIBIT_REASON_ABSENT) | \
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BIT(APICV_INHIBIT_REASON_HYPERV) | \
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BIT(APICV_INHIBIT_REASON_NESTED) | \
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BIT(APICV_INHIBIT_REASON_IRQWIN) | \
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BIT(APICV_INHIBIT_REASON_PIT_REINJ) | \
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BIT(APICV_INHIBIT_REASON_BLOCKIRQ) | \
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BIT(APICV_INHIBIT_REASON_SEV) | \
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BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) | \
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BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) | \
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BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) | \
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BIT(APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED) \
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)
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bool avic_hardware_setup(struct kvm_x86_ops *ops);
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int avic_ga_log_notifier(u32 ga_tag);
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@ -634,7 +649,6 @@ void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
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void avic_vcpu_put(struct kvm_vcpu *vcpu);
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void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu);
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void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu);
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bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason);
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int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
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uint32_t guest_irq, bool set);
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void avic_vcpu_blocking(struct kvm_vcpu *vcpu);
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@ -8023,18 +8023,16 @@ static void vmx_hardware_unsetup(void)
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free_kvm_area();
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}
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static bool vmx_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason)
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{
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ulong supported = BIT(APICV_INHIBIT_REASON_DISABLE) |
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BIT(APICV_INHIBIT_REASON_ABSENT) |
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BIT(APICV_INHIBIT_REASON_HYPERV) |
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BIT(APICV_INHIBIT_REASON_BLOCKIRQ) |
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BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) |
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BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) |
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BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED);
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return supported & BIT(reason);
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}
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#define VMX_REQUIRED_APICV_INHIBITS \
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( \
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BIT(APICV_INHIBIT_REASON_DISABLE)| \
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BIT(APICV_INHIBIT_REASON_ABSENT) | \
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BIT(APICV_INHIBIT_REASON_HYPERV) | \
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BIT(APICV_INHIBIT_REASON_BLOCKIRQ) | \
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BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) | \
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BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) | \
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BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) \
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)
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static void vmx_vm_destroy(struct kvm *kvm)
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{
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@ -8118,7 +8116,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = {
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.refresh_apicv_exec_ctrl = vmx_refresh_apicv_exec_ctrl,
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.load_eoi_exitmap = vmx_load_eoi_exitmap,
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.apicv_post_state_restore = vmx_apicv_post_state_restore,
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.check_apicv_inhibit_reasons = vmx_check_apicv_inhibit_reasons,
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.required_apicv_inhibits = VMX_REQUIRED_APICV_INHIBITS,
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.hwapic_irr_update = vmx_hwapic_irr_update,
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.hwapic_isr_update = vmx_hwapic_isr_update,
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.guest_apic_has_interrupt = vmx_guest_apic_has_interrupt,
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@ -10112,7 +10112,7 @@ void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
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lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
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if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(reason))
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if (!(kvm_x86_ops.required_apicv_inhibits & BIT(reason)))
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return;
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old = new = kvm->arch.apicv_inhibit_reasons;
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