accel/ivpu/37xx: Remove support for FPGA and simics
We do not run 37xx VPU on non-silicon platforms any longer. Remove deprecated code to make it cleaner. Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231020104501.697763-7-stanislaw.gruszka@linux.intel.com
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@ -68,37 +68,9 @@
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(REG_FLD(VPU_37XX_HOST_SS_FW_SOC_IRQ_EN, MSS_MBI)) | \
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(REG_FLD(VPU_37XX_HOST_SS_FW_SOC_IRQ_EN, MSS_MBI)) | \
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(REG_FLD(VPU_37XX_HOST_SS_FW_SOC_IRQ_EN, MSS_MBI_CMX)))
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(REG_FLD(VPU_37XX_HOST_SS_FW_SOC_IRQ_EN, MSS_MBI_CMX)))
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static char *ivpu_platform_to_str(u32 platform)
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{
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switch (platform) {
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case IVPU_PLATFORM_SILICON:
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return "IVPU_PLATFORM_SILICON";
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case IVPU_PLATFORM_SIMICS:
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return "IVPU_PLATFORM_SIMICS";
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case IVPU_PLATFORM_FPGA:
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return "IVPU_PLATFORM_FPGA";
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default:
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return "Invalid platform";
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}
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}
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static void ivpu_hw_read_platform(struct ivpu_device *vdev)
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{
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u32 gen_ctrl = REGV_RD32(VPU_37XX_HOST_SS_GEN_CTRL);
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u32 platform = REG_GET_FLD(VPU_37XX_HOST_SS_GEN_CTRL, PS, gen_ctrl);
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if (platform == IVPU_PLATFORM_SIMICS || platform == IVPU_PLATFORM_FPGA)
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vdev->platform = platform;
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else
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vdev->platform = IVPU_PLATFORM_SILICON;
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ivpu_dbg(vdev, MISC, "Platform type: %s (%d)\n",
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ivpu_platform_to_str(vdev->platform), vdev->platform);
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}
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static void ivpu_hw_wa_init(struct ivpu_device *vdev)
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static void ivpu_hw_wa_init(struct ivpu_device *vdev)
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{
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{
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vdev->wa.punit_disabled = ivpu_is_fpga(vdev);
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vdev->wa.punit_disabled = false;
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vdev->wa.clear_runtime_mem = false;
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vdev->wa.clear_runtime_mem = false;
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vdev->wa.d3hot_after_power_off = true;
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vdev->wa.d3hot_after_power_off = true;
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@ -113,19 +85,11 @@ static void ivpu_hw_wa_init(struct ivpu_device *vdev)
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static void ivpu_hw_timeouts_init(struct ivpu_device *vdev)
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static void ivpu_hw_timeouts_init(struct ivpu_device *vdev)
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{
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{
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if (ivpu_is_simics(vdev) || ivpu_is_fpga(vdev)) {
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vdev->timeout.boot = 1000;
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vdev->timeout.boot = 100000;
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vdev->timeout.jsm = 500;
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vdev->timeout.jsm = 50000;
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vdev->timeout.tdr = 2000;
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vdev->timeout.tdr = 2000000;
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vdev->timeout.reschedule_suspend = 10;
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vdev->timeout.reschedule_suspend = 1000;
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vdev->timeout.autosuspend = 10;
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vdev->timeout.autosuspend = -1;
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} else {
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vdev->timeout.boot = 1000;
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vdev->timeout.jsm = 500;
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vdev->timeout.tdr = 2000;
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vdev->timeout.reschedule_suspend = 10;
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vdev->timeout.autosuspend = 10;
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}
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}
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}
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static int ivpu_pll_wait_for_cmd_send(struct ivpu_device *vdev)
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static int ivpu_pll_wait_for_cmd_send(struct ivpu_device *vdev)
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@ -220,8 +184,7 @@ static int ivpu_pll_drive(struct ivpu_device *vdev, bool enable)
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int ret;
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int ret;
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if (IVPU_WA(punit_disabled)) {
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if (IVPU_WA(punit_disabled)) {
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ivpu_dbg(vdev, PM, "Skipping PLL request on %s\n",
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ivpu_dbg(vdev, PM, "Skipping PLL request\n");
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ivpu_platform_to_str(vdev->platform));
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return 0;
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return 0;
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}
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}
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@ -484,10 +447,6 @@ static void ivpu_boot_pwr_island_drive(struct ivpu_device *vdev, bool enable)
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static int ivpu_boot_wait_for_pwr_island_status(struct ivpu_device *vdev, u32 exp_val)
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static int ivpu_boot_wait_for_pwr_island_status(struct ivpu_device *vdev, u32 exp_val)
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{
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{
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/* FPGA model (UPF) is not power aware, skipped Power Island polling */
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if (ivpu_is_fpga(vdev))
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return 0;
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return REGV_POLL_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_STATUS0, MSS_CPU,
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return REGV_POLL_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_STATUS0, MSS_CPU,
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exp_val, PWR_ISLAND_STATUS_TIMEOUT_US);
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exp_val, PWR_ISLAND_STATUS_TIMEOUT_US);
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}
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}
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@ -632,7 +591,7 @@ static int ivpu_hw_37xx_info_init(struct ivpu_device *vdev)
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ivpu_hw_init_range(&hw->ranges.shave, 0x180000000, SZ_2G);
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ivpu_hw_init_range(&hw->ranges.shave, 0x180000000, SZ_2G);
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ivpu_hw_init_range(&hw->ranges.dma, 0x200000000, SZ_8G);
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ivpu_hw_init_range(&hw->ranges.dma, 0x200000000, SZ_8G);
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ivpu_hw_read_platform(vdev);
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vdev->platform = IVPU_PLATFORM_SILICON;
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ivpu_hw_wa_init(vdev);
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ivpu_hw_wa_init(vdev);
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ivpu_hw_timeouts_init(vdev);
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ivpu_hw_timeouts_init(vdev);
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