net/mlx5: DR, Move ACTION_CACHE_LINE_SIZE macro to header
Move ACTION_CACHE_LINE_SIZE macro to header to be used by the pattern functions as well. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -1365,8 +1365,6 @@ out_err:
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return -EINVAL;
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}
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#define ACTION_CACHE_LINE_SIZE 64
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static int
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dr_action_create_reformat_action(struct mlx5dr_domain *dmn,
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u8 reformat_param_0, u8 reformat_param_1,
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@ -1403,13 +1401,13 @@ dr_action_create_reformat_action(struct mlx5dr_domain *dmn,
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}
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case DR_ACTION_TYP_TNL_L3_TO_L2:
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{
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u8 hw_actions[ACTION_CACHE_LINE_SIZE] = {};
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u8 hw_actions[DR_ACTION_CACHE_LINE_SIZE] = {};
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int ret;
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ret = mlx5dr_ste_set_action_decap_l3_list(dmn->ste_ctx,
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data, data_sz,
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hw_actions,
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ACTION_CACHE_LINE_SIZE,
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DR_ACTION_CACHE_LINE_SIZE,
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&action->rewrite->num_of_actions);
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if (ret) {
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mlx5dr_dbg(dmn, "Failed creating decap l3 action list\n");
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@ -1427,7 +1425,7 @@ dr_action_create_reformat_action(struct mlx5dr_domain *dmn,
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action->rewrite->index = (mlx5dr_icm_pool_get_chunk_icm_addr
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(action->rewrite->chunk) -
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dmn->info.caps.hdr_modify_icm_addr) /
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ACTION_CACHE_LINE_SIZE;
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DR_ACTION_CACHE_LINE_SIZE;
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ret = mlx5dr_send_postsend_action(dmn, action);
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if (ret) {
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@ -2006,7 +2004,7 @@ static int dr_action_create_modify_action(struct mlx5dr_domain *dmn,
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action->rewrite->num_of_actions = num_hw_actions;
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action->rewrite->index = (mlx5dr_icm_pool_get_chunk_icm_addr(chunk) -
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dmn->info.caps.hdr_modify_icm_addr) /
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ACTION_CACHE_LINE_SIZE;
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DR_ACTION_CACHE_LINE_SIZE;
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ret = mlx5dr_send_postsend_action(dmn, action);
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if (ret)
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@ -21,6 +21,7 @@
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#define DR_NUM_OF_FLEX_PARSERS 8
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#define DR_STE_MAX_FLEX_0_ID 3
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#define DR_STE_MAX_FLEX_1_ID 7
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#define DR_ACTION_CACHE_LINE_SIZE 64
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#define mlx5dr_err(dmn, arg...) mlx5_core_err((dmn)->mdev, ##arg)
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#define mlx5dr_info(dmn, arg...) mlx5_core_info((dmn)->mdev, ##arg)
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