Add a lot of N900 nodes
Add OPP table to OMAP5/DRA7 Add support for Newflow NanoBone board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJSZ5pcAAoJEK1b4JDGryJ1FZgP/0DljEVHNoFa8no5GsXX0QO5 WbUF88gWHcO/wqs49/WMzRp6CWmqmZGneaDKMN6G7133abQNYWSGZZxAw0weZmeE SfO3rI3Wz65ZTlsqYY8KFfe2aig/JHoFVnLROOB8ergLeyZkwRQYP3Vsi+7YJ/72 RizufFYceU837DK7wL8+ewcdpIBKRMhfFXK859oa6R/Ng8VuTr/mMKNcxARVFsN4 X+8OYTx0wbKJoTLrE33iyhu7TnATZVdURUQFVpnABigKTL5klsybJcSS5kOT66wg 2gh26a0dFYpiZAOEohlsGnjDle6ecLZp0zD1q1JNjYKRnKJtHAJW4TRpani2VvQG p8zZpvNYszI9tQnK1PURyhIDlws3KnB24AdKE2DBaRvArP1/aNjJj2vRYdcxD9wN 87neatBMuumllng/0qDyPeZc/jMJrXh1x09NlKwj6JaaLNF6fofoBJU0hLZo7p4a vX/yEgTJP76JH/vEWwo0OvMGDvGlgEHmNx9sqhcIfJ5A12J/e4qJ5nZce06eCdo2 Rl+4h2PSzNc+bw4duAbWwrBP2SIX5speHFZlLs63uy8OsdcbrxEw6re2pFyf5bL1 DINE66iWR9lEzUd/ObeDcxSNnCwq5Lr9KchRhWILcSzaMWOqsjrEy+S8HOnLjg4Q G9Htlt07XhjbkCRmKyJh =inDp -----END PGP SIGNATURE----- Merge tag 'for_3.13_super_late/dts_signed' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.13/dt Add a lot of N900 nodes Add OPP table to OMAP5/DRA7 Add support for Newflow NanoBone board
This commit is contained in:
Tony Lindgren
commit
b4887e1637
@ -6088,6 +6088,12 @@ L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-omap.c
|
||||
|
||||
OMAP/NEWFLOW NANOBONE MACHINE SUPPORT
|
||||
M: Mark Jackson <mpfj@newflow.co.uk>
|
||||
L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/am335x-nano.dts
|
||||
|
||||
OMFS FILESYSTEM
|
||||
M: Bob Copeland <me@bobcopeland.com>
|
||||
L: linux-karma-devel@lists.sourceforge.net
|
||||
|
||||
@ -188,6 +188,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
|
||||
am335x-evmsk.dtb \
|
||||
am335x-bone.dtb \
|
||||
am335x-boneblack.dtb \
|
||||
am335x-nano.dtb \
|
||||
am335x-base0033.dtb \
|
||||
am3517-evm.dtb \
|
||||
am3517_mt_ventoux.dtb \
|
||||
|
||||
431
arch/arm/boot/dts/am335x-nano.dts
Normal file
431
arch/arm/boot/dts/am335x-nano.dts
Normal file
@ -0,0 +1,431 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "am33xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Newflow AM335x NanoBone";
|
||||
compatible = "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@0 {
|
||||
label = "nanobone:green:usr1";
|
||||
gpios = <&gpio1 5 0>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&misc_pins>;
|
||||
|
||||
misc_pins: misc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */
|
||||
>;
|
||||
};
|
||||
|
||||
gpmc_pins: gpmc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
|
||||
0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
|
||||
0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
|
||||
0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
|
||||
0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
|
||||
0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
|
||||
0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
|
||||
0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
|
||||
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
|
||||
0x84 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */
|
||||
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */
|
||||
|
||||
0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
|
||||
0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
|
||||
0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
|
||||
0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
|
||||
0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
|
||||
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
|
||||
0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
|
||||
0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
|
||||
0x17c (PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
0x184 (PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc0 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */
|
||||
0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
|
||||
0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc8 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */
|
||||
0x160 (PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */
|
||||
0x164 (PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: uart4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd0 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */
|
||||
0xd4 (PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */
|
||||
0x168 (PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
|
||||
0x16c (PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart5_pins: uart5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd8 (PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */
|
||||
0x144 (PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
|
||||
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
status = "okay";
|
||||
rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
|
||||
rs485-rts-active-high;
|
||||
rs485-rx-during-tx;
|
||||
rs485-rts-delay = <1 1>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
|
||||
rs485-rts-active-high;
|
||||
rs485-rts-delay = <1 1>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
gpio@20 {
|
||||
compatible = "mcp,mcp23017";
|
||||
reg = <0x20>;
|
||||
};
|
||||
|
||||
tps: tps@24 {
|
||||
reg = <0x24>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "mcp,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1307";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
compatible = "ti,am3352-gpmc";
|
||||
ti,hwmods = "gpmc";
|
||||
status = "okay";
|
||||
gpmc,num-waitpins = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpmc_pins>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x08000000 0x08000000>; /* CS0: NOR 128M */
|
||||
|
||||
nor@0,0 {
|
||||
reg = <0 0x00000000 0x08000000>;
|
||||
compatible = "cfi-flash";
|
||||
linux,mtd-name = "spansion,s29gl010p11t";
|
||||
bank-width = <2>;
|
||||
|
||||
gpmc,mux-add-data = <2>;
|
||||
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <160>;
|
||||
gpmc,cs-wr-off-ns = <160>;
|
||||
gpmc,adv-on-ns = <10>;
|
||||
gpmc,adv-rd-off-ns = <30>;
|
||||
gpmc,adv-wr-off-ns = <30>;
|
||||
gpmc,oe-on-ns = <40>;
|
||||
gpmc,oe-off-ns = <160>;
|
||||
gpmc,we-on-ns = <40>;
|
||||
gpmc,we-off-ns = <160>;
|
||||
gpmc,rd-cycle-ns = <160>;
|
||||
gpmc,wr-cycle-ns = <160>;
|
||||
gpmc,access-ns = <150>;
|
||||
gpmc,page-burst-access-ns = <10>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-delay-ns = <20>;
|
||||
gpmc,wr-data-mux-bus-ns = <70>;
|
||||
gpmc,wr-access-ns = <80>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/*
|
||||
MTD partition table
|
||||
===================
|
||||
+------------+-->0x00000000-> U-Boot start
|
||||
| |
|
||||
| |-->0x000BFFFF-> U-Boot end
|
||||
| |-->0x000C0000-> ENV1 start
|
||||
| |
|
||||
| |-->0x000DFFFF-> ENV1 end
|
||||
| |-->0x000E0000-> ENV2 start
|
||||
| |
|
||||
| |-->0x000FFFFF-> ENV2 end
|
||||
| |-->0x00100000-> Kernel start
|
||||
| |
|
||||
| |-->0x004FFFFF-> Kernel end
|
||||
| |-->0x00500000-> File system start
|
||||
| |
|
||||
| |-->0x014FFFFF-> File system end
|
||||
| |-->0x01500000-> User data start
|
||||
| |
|
||||
| |-->0x03FFFFFF-> User data end
|
||||
| |-->0x04000000-> Data storage start
|
||||
| |
|
||||
+------------+-->0x08000000-> NOR end (Free end)
|
||||
*/
|
||||
partition@0 {
|
||||
label = "boot";
|
||||
reg = <0x00000000 0x000c0000>; /* 768KB */
|
||||
};
|
||||
|
||||
partition@1 {
|
||||
label = "env1";
|
||||
reg = <0x000c0000 0x00020000>; /* 128KB */
|
||||
};
|
||||
|
||||
partition@2 {
|
||||
label = "env2";
|
||||
reg = <0x000e0000 0x00020000>; /* 128KB */
|
||||
};
|
||||
|
||||
partition@3 {
|
||||
label = "kernel";
|
||||
reg = <0x00100000 0x00400000>; /* 4MB */
|
||||
};
|
||||
|
||||
partition@4 {
|
||||
label = "rootfs";
|
||||
reg = <0x00500000 0x01000000>; /* 16MB */
|
||||
};
|
||||
|
||||
partition@5 {
|
||||
label = "user";
|
||||
reg = <0x01500000 0x02b00000>; /* 43MB */
|
||||
};
|
||||
|
||||
partition@6 {
|
||||
label = "data";
|
||||
reg = <0x04000000 0x04000000>; /* 64MB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
dual_emac = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&ldo4_reg>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio3 8 0>;
|
||||
wp-gpios = <&gpio3 18 0>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
regulators {
|
||||
dcdc1_reg: regulator@0 {
|
||||
/* +1.5V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1450000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <915000>;
|
||||
regulator-max-microvolt = <1140000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <915000>;
|
||||
regulator-max-microvolt = <1140000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -416,7 +416,7 @@
|
||||
ti,hwmods = "usb_otg_hs";
|
||||
status = "disabled";
|
||||
|
||||
ctrl_mod: control@44e10000 {
|
||||
usb_ctrl_mod: control@44e10000 {
|
||||
compatible = "ti,am335x-usb-ctrl-module";
|
||||
reg = <0x44e10620 0x10
|
||||
0x44e10648 0x4>;
|
||||
@ -429,7 +429,7 @@
|
||||
reg = <0x47401300 0x100>;
|
||||
reg-names = "phy";
|
||||
status = "disabled";
|
||||
ti,ctrl_mod = <&ctrl_mod>;
|
||||
ti,ctrl_mod = <&usb_ctrl_mod>;
|
||||
};
|
||||
|
||||
usb0: usb@47401000 {
|
||||
@ -477,7 +477,7 @@
|
||||
reg = <0x47401b00 0x100>;
|
||||
reg-names = "phy";
|
||||
status = "disabled";
|
||||
ti,ctrl_mod = <&ctrl_mod>;
|
||||
ti,ctrl_mod = <&usb_ctrl_mod>;
|
||||
};
|
||||
|
||||
usb1: usb@47401800 {
|
||||
|
||||
@ -269,3 +269,7 @@
|
||||
vmmc-supply = <&mmc2_3v3>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps123_reg>;
|
||||
};
|
||||
|
||||
@ -37,10 +37,16 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0>;
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
1000000 1060000
|
||||
1176000 1160000
|
||||
>;
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
|
||||
@ -26,9 +26,116 @@
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
camera_lens_cover {
|
||||
label = "Camera Lens Cover";
|
||||
gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
|
||||
linux,input-type = <5>; /* EV_SW */
|
||||
linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
camera_focus {
|
||||
label = "Camera Focus";
|
||||
gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
|
||||
linux,code = <0x210>; /* KEY_CAMERA_FOCUS */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
camera_capture {
|
||||
label = "Camera Capture";
|
||||
gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
|
||||
linux,code = <0xd4>; /* KEY_CAMERA */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
lock_button {
|
||||
label = "Lock Button";
|
||||
gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
|
||||
linux,code = <0x98>; /* KEY_SCREENLOCK */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
keypad_slide {
|
||||
label = "Keypad Slide";
|
||||
gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
|
||||
linux,input-type = <5>; /* EV_SW */
|
||||
linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
proximity_sensor {
|
||||
label = "Proximity Sensor";
|
||||
gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
|
||||
linux,input-type = <5>; /* EV_SW */
|
||||
linux,code = <0x0b>; /* SW_FRONT_PROXIMITY */
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */
|
||||
0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18a (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18e (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
0x190 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x192 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
0x194 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
|
||||
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
display_pins: pinmux_display_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
clock-frequency = <2200000>;
|
||||
|
||||
twl: twl@48 {
|
||||
@ -39,6 +146,98 @@
|
||||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&vaux1 {
|
||||
regulator-name = "V28";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on; /* due battery cover sensor */
|
||||
};
|
||||
|
||||
&vaux2 {
|
||||
regulator-name = "VCSI";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
&vaux3 {
|
||||
regulator-name = "VMMC2_30";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
&vaux4 {
|
||||
regulator-name = "VCAM_ANA_28";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
&vmmc1 {
|
||||
regulator-name = "VMMC1";
|
||||
regulator-min-microvolt = <1850000>;
|
||||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
&vmmc2 {
|
||||
regulator-name = "V28_A";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on; /* due VIO leak to AIC34 VDDs */
|
||||
};
|
||||
|
||||
&vpll1 {
|
||||
regulator-name = "VPLL";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vpll2 {
|
||||
regulator-name = "VSDI_CSI";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vsim {
|
||||
regulator-name = "VMMC2_IO_18";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
&vio {
|
||||
regulator-name = "VIO";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
};
|
||||
|
||||
&vintana1 {
|
||||
regulator-name = "VINTANA1";
|
||||
/* fixed to 1500000 */
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vintana2 {
|
||||
regulator-name = "VINTANA2";
|
||||
regulator-min-microvolt = <2750000>;
|
||||
regulator-max-microvolt = <2750000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vintdig {
|
||||
regulator-name = "VINTDIG";
|
||||
/* fixed to 1500000 */
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&twl {
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
ti,enable-vibra = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,pullups = <0x0>;
|
||||
@ -46,15 +245,117 @@
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
|
||||
clock-frequency = <100000>;
|
||||
|
||||
tlv320aic3x: tlv320aic3x@18 {
|
||||
compatible = "ti,tlv320aic3x";
|
||||
reg = <0x18>;
|
||||
gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
|
||||
ai3x-gpio-func = <
|
||||
0 /* AIC3X_GPIO1_FUNC_DISABLED */
|
||||
5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
|
||||
>;
|
||||
|
||||
AVDD-supply = <&vmmc2>;
|
||||
DRVDD-supply = <&vmmc2>;
|
||||
IOVDD-supply = <&vio>;
|
||||
DVDD-supply = <&vio>;
|
||||
};
|
||||
|
||||
tlv320aic3x_aux: tlv320aic3x@19 {
|
||||
compatible = "ti,tlv320aic3x";
|
||||
reg = <0x19>;
|
||||
gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
|
||||
|
||||
AVDD-supply = <&vmmc2>;
|
||||
DRVDD-supply = <&vmmc2>;
|
||||
IOVDD-supply = <&vio>;
|
||||
DVDD-supply = <&vio>;
|
||||
};
|
||||
|
||||
lp5523: lp5523@32 {
|
||||
compatible = "national,lp5523";
|
||||
reg = <0x32>;
|
||||
clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
|
||||
enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
|
||||
|
||||
chan0 {
|
||||
chan-name = "lp5523:kb1";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan1 {
|
||||
chan-name = "lp5523:kb2";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan2 {
|
||||
chan-name = "lp5523:kb3";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan3 {
|
||||
chan-name = "lp5523:kb4";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan4 {
|
||||
chan-name = "lp5523:b";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan5 {
|
||||
chan-name = "lp5523:g";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan6 {
|
||||
chan-name = "lp5523:r";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan7 {
|
||||
chan-name = "lp5523:kb5";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan8 {
|
||||
chan-name = "lp5523:kb6";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
};
|
||||
|
||||
bq27200: bq27200@55 {
|
||||
compatible = "ti,bq27200";
|
||||
reg = <0x55>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vmmc1>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
@ -65,6 +366,78 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x04000000 0x10000000>; /* 256MB */
|
||||
|
||||
/* gpio-irq for dma: 65 */
|
||||
|
||||
onenand@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0 0 0x10000000>;
|
||||
|
||||
gpmc,sync-read;
|
||||
gpmc,sync-write;
|
||||
gpmc,burst-length = <16>;
|
||||
gpmc,burst-read;
|
||||
gpmc,burst-wrap;
|
||||
gpmc,burst-write;
|
||||
gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
|
||||
gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <87>;
|
||||
gpmc,cs-wr-off-ns = <87>;
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <10>;
|
||||
gpmc,adv-wr-off-ns = <10>;
|
||||
gpmc,oe-on-ns = <15>;
|
||||
gpmc,oe-off-ns = <87>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <87>;
|
||||
gpmc,rd-cycle-ns = <112>;
|
||||
gpmc,wr-cycle-ns = <112>;
|
||||
gpmc,access-ns = <81>;
|
||||
gpmc,page-burst-access-ns = <15>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,clk-activation-ns = <5>;
|
||||
gpmc,wr-data-mux-bus-ns = <30>;
|
||||
gpmc,wr-access-ns = <81>;
|
||||
gpmc,sync-clk-ps = <15000>;
|
||||
|
||||
/*
|
||||
* MTD partition table corresponding to Nokia's
|
||||
* Maemo 5 (Fremantle) release.
|
||||
*/
|
||||
partition@0 {
|
||||
label = "bootloader";
|
||||
reg = <0x00000000 0x00020000>;
|
||||
read-only;
|
||||
};
|
||||
partition@1 {
|
||||
label = "config";
|
||||
reg = <0x00020000 0x00060000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "log";
|
||||
reg = <0x00080000 0x00040000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "kernel";
|
||||
reg = <0x000c0000 0x00200000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "initfs";
|
||||
reg = <0x002c0000 0x00200000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "rootfs";
|
||||
reg = <0x004c0000 0x0fb40000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcspi1 {
|
||||
/*
|
||||
* For some reason, touchscreen is necessary for screen to work at
|
||||
@ -81,6 +454,9 @@
|
||||
compatible = "acx565akm";
|
||||
spi-max-frequency = <6000000>;
|
||||
reg = <2>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&display_pins>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -92,3 +468,17 @@
|
||||
mode = <2>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
@ -62,7 +62,6 @@
|
||||
pinctrl-0 = <
|
||||
&twl6040_pins
|
||||
&mcpdm_pins
|
||||
&dmic_pins
|
||||
&mcbsp1_pins
|
||||
&mcbsp2_pins
|
||||
&usbhost_pins
|
||||
@ -71,7 +70,7 @@
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
|
||||
0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -85,15 +84,6 @@
|
||||
>;
|
||||
};
|
||||
|
||||
dmic_pins: pinmux_dmic_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
|
||||
0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
|
||||
0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
|
||||
0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
|
||||
@ -131,25 +121,25 @@
|
||||
0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
|
||||
0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
|
||||
0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
|
||||
0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */
|
||||
0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi3_pins: pinmux_mcspi3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
|
||||
0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
|
||||
0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
|
||||
0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
|
||||
0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
|
||||
0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
|
||||
0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
|
||||
0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi4_pins: pinmux_mcspi4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
|
||||
0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
|
||||
0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
|
||||
0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
|
||||
0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */
|
||||
0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */
|
||||
0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */
|
||||
0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -501,3 +491,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5_pins>;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps123_reg>;
|
||||
};
|
||||
|
||||
@ -38,10 +38,17 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x0>;
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
500000 880000
|
||||
1000000 1060000
|
||||
1500000 1250000
|
||||
>;
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
|
||||
@ -23,6 +23,22 @@
|
||||
compatible = "ti,twl4030-wdt";
|
||||
};
|
||||
|
||||
vaux1: regulator-vaux1 {
|
||||
compatible = "ti,twl4030-vaux1";
|
||||
};
|
||||
|
||||
vaux2: regulator-vaux2 {
|
||||
compatible = "ti,twl4030-vaux2";
|
||||
};
|
||||
|
||||
vaux3: regulator-vaux3 {
|
||||
compatible = "ti,twl4030-vaux3";
|
||||
};
|
||||
|
||||
vaux4: regulator-vaux4 {
|
||||
compatible = "ti,twl4030-vaux4";
|
||||
};
|
||||
|
||||
vcc: regulator-vdd1 {
|
||||
compatible = "ti,twl4030-vdd1";
|
||||
regulator-min-microvolt = <600000>;
|
||||
@ -35,10 +51,20 @@
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vpll2: regulator-vpll2 {
|
||||
compatible = "ti,twl4030-vpll2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vio: regulator-vio {
|
||||
compatible = "ti,twl4030-vio";
|
||||
};
|
||||
|
||||
vintana1: regulator-vintana1 {
|
||||
compatible = "ti,twl4030-vintana1";
|
||||
};
|
||||
|
||||
vintana2: regulator-vintana2 {
|
||||
compatible = "ti,twl4030-vintana2";
|
||||
};
|
||||
|
||||
vintdig: regulator-vintdig {
|
||||
compatible = "ti,twl4030-vintdig";
|
||||
};
|
||||
|
||||
vmmc1: regulator-vmmc1 {
|
||||
@ -65,6 +91,16 @@
|
||||
compatible = "ti,twl4030-vusb3v1";
|
||||
};
|
||||
|
||||
vpll1: regulator-vpll1 {
|
||||
compatible = "ti,twl4030-vpll1";
|
||||
};
|
||||
|
||||
vpll2: regulator-vpll2 {
|
||||
compatible = "ti,twl4030-vpll2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vsim: regulator-vsim {
|
||||
compatible = "ti,twl4030-vsim";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
@ -97,4 +133,9 @@
|
||||
compatible = "ti,twl4030-pwmled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
twl_pwrbutton: pwrbutton {
|
||||
compatible = "ti,twl4030-pwrbutton";
|
||||
interrupts = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user