RDMA/irdma: Implement device supported verb APIs
Implement device supported verb APIs. The supported APIs vary based on the underlying transport the ibdev is registered as (i.e. iWARP or RoCEv2). Link: https://lore.kernel.org/r/20210602205138.889-10-shiraz.saleem@intel.com Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Mustafa Ismail
Jason Gunthorpe
parent
e8c4dbc2fc
commit
b48c24c2d7
4527
drivers/infiniband/hw/irdma/verbs.c
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4527
drivers/infiniband/hw/irdma/verbs.c
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File diff suppressed because it is too large
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225
drivers/infiniband/hw/irdma/verbs.h
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225
drivers/infiniband/hw/irdma/verbs.h
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@ -0,0 +1,225 @@
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/* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
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/* Copyright (c) 2015 - 2021 Intel Corporation */
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#ifndef IRDMA_VERBS_H
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#define IRDMA_VERBS_H
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#define IRDMA_MAX_SAVED_PHY_PGADDR 4
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#define IRDMA_PKEY_TBL_SZ 1
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#define IRDMA_DEFAULT_PKEY 0xFFFF
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struct irdma_ucontext {
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struct ib_ucontext ibucontext;
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struct irdma_device *iwdev;
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struct rdma_user_mmap_entry *db_mmap_entry;
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struct list_head cq_reg_mem_list;
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spinlock_t cq_reg_mem_list_lock; /* protect CQ memory list */
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struct list_head qp_reg_mem_list;
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spinlock_t qp_reg_mem_list_lock; /* protect QP memory list */
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int abi_ver;
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bool legacy_mode;
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};
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struct irdma_pd {
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struct ib_pd ibpd;
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struct irdma_sc_pd sc_pd;
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};
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struct irdma_av {
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u8 macaddr[16];
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struct rdma_ah_attr attrs;
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union {
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struct sockaddr saddr;
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struct sockaddr_in saddr_in;
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struct sockaddr_in6 saddr_in6;
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} sgid_addr, dgid_addr;
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u8 net_type;
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};
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struct irdma_ah {
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struct ib_ah ibah;
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struct irdma_sc_ah sc_ah;
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struct irdma_pd *pd;
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struct irdma_av av;
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u8 sgid_index;
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union ib_gid dgid;
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};
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struct irdma_hmc_pble {
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union {
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u32 idx;
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dma_addr_t addr;
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};
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};
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struct irdma_cq_mr {
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struct irdma_hmc_pble cq_pbl;
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dma_addr_t shadow;
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bool split;
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};
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struct irdma_qp_mr {
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struct irdma_hmc_pble sq_pbl;
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struct irdma_hmc_pble rq_pbl;
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dma_addr_t shadow;
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struct page *sq_page;
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};
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struct irdma_cq_buf {
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struct irdma_dma_mem kmem_buf;
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struct irdma_cq_uk cq_uk;
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struct irdma_hw *hw;
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struct list_head list;
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struct work_struct work;
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};
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struct irdma_pbl {
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struct list_head list;
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union {
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struct irdma_qp_mr qp_mr;
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struct irdma_cq_mr cq_mr;
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};
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bool pbl_allocated:1;
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bool on_list:1;
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u64 user_base;
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struct irdma_pble_alloc pble_alloc;
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struct irdma_mr *iwmr;
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};
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struct irdma_mr {
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union {
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struct ib_mr ibmr;
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struct ib_mw ibmw;
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};
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struct ib_umem *region;
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u16 type;
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u32 page_cnt;
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u64 page_size;
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u32 npages;
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u32 stag;
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u64 len;
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u64 pgaddrmem[IRDMA_MAX_SAVED_PHY_PGADDR];
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struct irdma_pbl iwpbl;
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};
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struct irdma_cq {
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struct ib_cq ibcq;
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struct irdma_sc_cq sc_cq;
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u16 cq_head;
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u16 cq_size;
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u16 cq_num;
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bool user_mode;
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u32 polled_cmpls;
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u32 cq_mem_size;
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struct irdma_dma_mem kmem;
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struct irdma_dma_mem kmem_shadow;
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spinlock_t lock; /* for poll cq */
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struct irdma_pbl *iwpbl;
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struct irdma_pbl *iwpbl_shadow;
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struct list_head resize_list;
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struct irdma_cq_poll_info cur_cqe;
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};
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struct disconn_work {
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struct work_struct work;
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struct irdma_qp *iwqp;
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};
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struct iw_cm_id;
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struct irdma_qp_kmode {
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struct irdma_dma_mem dma_mem;
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struct irdma_sq_uk_wr_trk_info *sq_wrid_mem;
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u64 *rq_wrid_mem;
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};
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struct irdma_qp {
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struct ib_qp ibqp;
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struct irdma_sc_qp sc_qp;
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struct irdma_device *iwdev;
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struct irdma_cq *iwscq;
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struct irdma_cq *iwrcq;
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struct irdma_pd *iwpd;
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struct rdma_user_mmap_entry *push_wqe_mmap_entry;
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struct rdma_user_mmap_entry *push_db_mmap_entry;
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struct irdma_qp_host_ctx_info ctx_info;
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union {
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struct irdma_iwarp_offload_info iwarp_info;
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struct irdma_roce_offload_info roce_info;
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};
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union {
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struct irdma_tcp_offload_info tcp_info;
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struct irdma_udp_offload_info udp_info;
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};
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struct irdma_ah roce_ah;
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struct list_head teardown_entry;
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refcount_t refcnt;
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struct iw_cm_id *cm_id;
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struct irdma_cm_node *cm_node;
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struct ib_mr *lsmm_mr;
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atomic_t hw_mod_qp_pend;
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enum ib_qp_state ibqp_state;
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u32 qp_mem_size;
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u32 last_aeq;
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int max_send_wr;
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int max_recv_wr;
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atomic_t close_timer_started;
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spinlock_t lock; /* serialize posting WRs to SQ/RQ */
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struct irdma_qp_context *iwqp_context;
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void *pbl_vbase;
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dma_addr_t pbl_pbase;
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struct page *page;
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u8 active_conn : 1;
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u8 user_mode : 1;
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u8 hte_added : 1;
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u8 flush_issued : 1;
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u8 sig_all : 1;
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u8 pau_mode : 1;
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u8 rsvd : 1;
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u8 iwarp_state;
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u16 term_sq_flush_code;
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u16 term_rq_flush_code;
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u8 hw_iwarp_state;
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u8 hw_tcp_state;
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struct irdma_qp_kmode kqp;
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struct irdma_dma_mem host_ctx;
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struct timer_list terminate_timer;
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struct irdma_pbl *iwpbl;
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struct irdma_dma_mem q2_ctx_mem;
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struct irdma_dma_mem ietf_mem;
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struct completion free_qp;
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wait_queue_head_t waitq;
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wait_queue_head_t mod_qp_waitq;
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u8 rts_ae_rcvd;
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};
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enum irdma_mmap_flag {
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IRDMA_MMAP_IO_NC,
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IRDMA_MMAP_IO_WC,
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};
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struct irdma_user_mmap_entry {
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struct rdma_user_mmap_entry rdma_entry;
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u64 bar_offset;
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u8 mmap_flag;
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};
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static inline u16 irdma_fw_major_ver(struct irdma_sc_dev *dev)
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{
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return (u16)FIELD_GET(IRDMA_FW_VER_MAJOR, dev->feature_info[IRDMA_FEATURE_FW_INFO]);
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}
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static inline u16 irdma_fw_minor_ver(struct irdma_sc_dev *dev)
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{
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return (u16)FIELD_GET(IRDMA_FW_VER_MINOR, dev->feature_info[IRDMA_FEATURE_FW_INFO]);
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}
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void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4);
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int irdma_ib_register_device(struct irdma_device *iwdev);
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void irdma_ib_unregister_device(struct irdma_device *iwdev);
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void irdma_ib_dealloc_device(struct ib_device *ibdev);
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void irdma_ib_qp_event(struct irdma_qp *iwqp, enum irdma_qp_event_type event);
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#endif /* IRDMA_VERBS_H */
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@ -240,6 +240,7 @@ enum rdma_driver_id {
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RDMA_DRIVER_OCRDMA,
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RDMA_DRIVER_NES,
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RDMA_DRIVER_I40IW,
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RDMA_DRIVER_IRDMA = RDMA_DRIVER_I40IW,
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RDMA_DRIVER_VMW_PVRDMA,
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RDMA_DRIVER_QEDR,
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RDMA_DRIVER_HNS,
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