PCI: add ID-based ordering enable/disable support
Add support to allow drivers to enable/disable ID-based ordering. Where supported, ID-based ordering can significantly improve the latency of individual requests by preventing them from queueing up behind unrelated traffic. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -1834,6 +1834,59 @@ void pci_enable_ari(struct pci_dev *dev)
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bridge->ari_enabled = 1;
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}
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/**
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* pci_enable_ido - enable ID-based ordering on a device
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* @dev: the PCI device
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* @type: which types of IDO to enable
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*
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* Enable ID-based ordering on @dev. @type can contain the bits
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* %PCI_EXP_IDO_REQUEST and/or %PCI_EXP_IDO_COMPLETION to indicate
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* which types of transactions are allowed to be re-ordered.
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*/
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void pci_enable_ido(struct pci_dev *dev, unsigned long type)
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{
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int pos;
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u16 ctrl;
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pos = pci_pcie_cap(dev);
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if (!pos)
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return;
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pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
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if (type & PCI_EXP_IDO_REQUEST)
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ctrl |= PCI_EXP_IDO_REQ_EN;
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if (type & PCI_EXP_IDO_COMPLETION)
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ctrl |= PCI_EXP_IDO_CMP_EN;
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
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}
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EXPORT_SYMBOL(pci_enable_ido);
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/**
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* pci_disable_ido - disable ID-based ordering on a device
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* @dev: the PCI device
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* @type: which types of IDO to disable
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*/
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void pci_disable_ido(struct pci_dev *dev, unsigned long type)
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{
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int pos;
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u16 ctrl;
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if (!pci_is_pcie(dev))
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return;
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pos = pci_pcie_cap(dev);
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if (!pos)
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return;
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pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
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if (type & PCI_EXP_IDO_REQUEST)
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ctrl &= ~PCI_EXP_IDO_REQ_EN;
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if (type & PCI_EXP_IDO_COMPLETION)
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ctrl &= ~PCI_EXP_IDO_CMP_EN;
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
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}
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EXPORT_SYMBOL(pci_disable_ido);
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static int pci_acs_enable;
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/**
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@ -828,6 +828,11 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
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return __pci_enable_wake(dev, state, false, enable);
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}
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#define PCI_EXP_IDO_REQUEST (1<<0)
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#define PCI_EXP_IDO_COMPLETION (1<<1)
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void pci_enable_ido(struct pci_dev *dev, unsigned long type);
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void pci_disable_ido(struct pci_dev *dev, unsigned long type);
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/* For use by arch with custom probe code */
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void set_pcie_port_type(struct pci_dev *pdev);
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void set_pcie_hotplug_bridge(struct pci_dev *pdev);
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@ -1207,6 +1212,14 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
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return 0;
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}
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static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
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{
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}
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static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
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{
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}
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static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
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{
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return -EIO;
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@ -510,6 +510,8 @@
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#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
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#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
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#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
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#define PCI_EXP_IDO_REQ_EN 0x100 /* ID-based ordering request enable */
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#define PCI_EXP_IDO_CMP_EN 0x200 /* ID-based ordering completion enable */
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#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
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#define PCI_EXP_SLTCTL2 56 /* Slot Control 2 */
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