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MIPS: asm: mipsregs: Add support for the LLADDR register

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If Config5/LLB is set in the core, then software can write the LLB
bit in the LLADDR register.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
This commit is contained in:
Markos Chandras 2014-12-03 12:31:42 +00:00
parent 5aed9da128
commit b55b9e2715
1 changed files with 2 additions and 0 deletions
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2
arch/mips/include/asm/mipsregs.h
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@ -1128,6 +1128,8 @@ do { \
#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
#define read_c0_lladdr() __read_ulong_c0_register($17, 0)
#define write_c0_lladdr(val) __write_ulong_c0_register($17, 0, val)
#define read_c0_maar() __read_ulong_c0_register($17, 1)
#define write_c0_maar(val) __write_ulong_c0_register($17, 1, val)
#define read_c0_maari() __read_32bit_c0_register($17, 2)