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PCI: dwc: Fix a 64bit bug in dw_pcie_ep_raise_msix_irq()

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The "msg_addr" variable is u64.  However, the "aligned_offset" is an
unsigned int.  This means that when the code does:

  msg_addr &= ~aligned_offset;

it will unintentionally zero out the high 32 bits.  Use ALIGN_DOWN() to do
the alignment instead.

Fixes: 2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support")
Link: https://lore.kernel.org/r/af59c7ad-ab93-40f7-ad4a-7ac0b14d37f5@moroto.mountain
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <stable@vger.kernel.org>
This commit is contained in:
Dan Carpenter 2024-01-26 11:40:37 +03:00 committed by Bjorn Helgaas
parent 6613476e22
commit b5d1b4b46f
1 changed files with 2 additions and 1 deletions
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3
drivers/pci/controller/dwc/pcie-designware-ep.c
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@ -6,6 +6,7 @@
* Author: Kishon Vijay Abraham I <kishon@ti.com> * Author: Kishon Vijay Abraham I <kishon@ti.com>
*/ */
#include <linux/align.h>
#include <linux/bitfield.h> #include <linux/bitfield.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
@ -551,7 +552,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
} }
aligned_offset = msg_addr & (epc->mem->window.page_size - 1); aligned_offset = msg_addr & (epc->mem->window.page_size - 1);
msg_addr &= ~aligned_offset; msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
epc->mem->window.page_size); epc->mem->window.page_size);
if (ret) if (ret)