Merge branch 'i2c/for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang: - if a host can be a client, too, the I2C core can now use it to emulate SMBus HostNotify support (STM32 and R-Car added this so far) - also for client mode, a testunit has been added. It can create rare situations on the bus, so host controllers can be tested - a binding has been added to mark the bus as "single-master". This allows for better timeout detections - new driver for Mellanox Bluefield - massive refactoring of the Tegra driver - EEPROMs recognized by the at24 driver can now have custom names - rest is driver updates * 'i2c/for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (80 commits) Documentation: i2c: add testunit docs to index i2c: tegra: Improve driver module description i2c: tegra: Clean up whitespaces, newlines and indentation i2c: tegra: Clean up and improve comments i2c: tegra: Clean up printk messages i2c: tegra: Clean up variable names i2c: tegra: Improve formatting of variables i2c: tegra: Check errors for both positive and negative values i2c: tegra: Factor out hardware initialization into separate function i2c: tegra: Factor out register polling into separate function i2c: tegra: Factor out packet header setup from tegra_i2c_xfer_msg() i2c: tegra: Factor out error recovery from tegra_i2c_xfer_msg() i2c: tegra: Rename wait/poll functions i2c: tegra: Remove "dma" variable from tegra_i2c_xfer_msg() i2c: tegra: Remove redundant check in tegra_i2c_issue_bus_clear() i2c: tegra: Remove likely/unlikely from the code i2c: tegra: Remove outdated barrier() i2c: tegra: Clean up variable types i2c: tegra: Reorder location of functions in the code i2c: tegra: Clean up probe function ...
This commit is contained in:
@ -114,6 +114,9 @@ properties:
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- const: renesas,r1ex24128
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- const: atmel,24c128
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label:
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description: Descriptive name of the EEPROM.
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reg:
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maxItems: 1
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@ -9,12 +9,18 @@ title: Freescale Low Power Inter IC (LPI2C) for i.MX
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maintainers:
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- Anson Huang <Anson.Huang@nxp.com>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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compatible:
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enum:
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- fsl,imx7ulp-lpi2c
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- fsl,imx8qxp-lpi2c
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- fsl,imx8qm-lpi2c
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oneOf:
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- enum:
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- fsl,imx7ulp-lpi2c
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- fsl,imx8qm-lpi2c
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- items:
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- const: fsl,imx8qxp-lpi2c
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- const: fsl,imx7ulp-lpi2c
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reg:
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maxItems: 1
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@ -22,23 +28,34 @@ properties:
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interrupts:
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maxItems: 1
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assigned-clock-parents: true
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assigned-clock-rates: true
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assigned-clocks: true
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clock-frequency: true
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clock-names:
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maxItems: 1
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx7ulp-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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lpi2c7@40a50000 {
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i2c@40a50000 {
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compatible = "fsl,imx7ulp-lpi2c";
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reg = <0x40A50000 0x10000>;
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interrupt-parent = <&intc>;
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@ -9,6 +9,9 @@ title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
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maintainers:
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- Wolfram Sang <wolfram@the-dreams.de>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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compatible:
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oneOf:
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@ -18,6 +21,9 @@ properties:
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- items:
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- const: fsl,imx35-i2c
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- const: fsl,imx1-i2c
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- items:
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- const: fsl,imx7d-i2c
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- const: fsl,imx21-i2c
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- items:
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- enum:
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- fsl,imx25-i2c
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@ -75,7 +81,7 @@ required:
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- interrupts
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- clocks
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additionalProperties: false
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unevaluatedProperties: false
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examples:
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- |
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@ -87,6 +87,11 @@ wants to support one of the below features, it should adapt these bindings.
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this information to detect a stalled bus more reliably, for example.
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Can not be combined with 'multi-master'.
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- smbus
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states that additional SMBus restrictions and features apply to this bus.
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Examples of features are SMBusHostNotify and SMBusAlert. Examples of
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restrictions are more reserved addresses and timeout definitions.
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Required properties (per child device)
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--------------------------------------
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@ -17,9 +17,13 @@ properties:
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pattern: "^i2c@[0-9a-f]+$"
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compatible:
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enum:
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- ingenic,jz4780-i2c
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- ingenic,x1000-i2c
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oneOf:
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- enum:
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- ingenic,jz4770-i2c
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- ingenic,x1000-i2c
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- items:
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- const: ingenic,jz4780-i2c
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- const: ingenic,jz4770-i2c
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reg:
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maxItems: 1
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@ -60,7 +64,7 @@ examples:
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#include <dt-bindings/dma/jz4780-dma.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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i2c@10054000 {
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compatible = "ingenic,jz4780-i2c";
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compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10054000 0x1000>;
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42
Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt
Normal file
42
Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt
Normal file
@ -0,0 +1,42 @@
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Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs
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Required Properties:
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- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2".
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- reg : address offset and length of the device registers. The
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registers consist of the following set of resources:
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1) Smbus block registers.
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2) Cause master registers.
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3) Cause slave registers.
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4) Cause coalesce registers (if compatible isn't set
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to "mellanox,i2c-mlxbf1").
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- interrupts : interrupt number.
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Optional Properties:
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- clock-frequency : bus frequency used to configure timing registers;
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allowed values are 100000, 400000 and 1000000;
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those are expressed in Hz. Default is 100000.
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Example:
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i2c@2804000 {
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compatible = "mellanox,i2c-mlxbf1";
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reg = <0x02804000 0x800>,
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<0x02801200 0x020>,
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<0x02801260 0x020>;
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interrupts = <57>;
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clock-frequency = <100000>;
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};
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i2c@2808800 {
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compatible = "mellanox,i2c-mlxbf2";
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reg = <0x02808800 0x600>,
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<0x02808e00 0x020>,
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<0x02808e20 0x020>,
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<0x02808e40 0x010>;
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interrupts = <57>;
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clock-frequency = <400000>;
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};
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