arm64: dts: rockchip: add i2s_8ch_2 and i2s_8ch_3 to rk3308
These are I2S engines internally connected to the built-in audio codec. Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Link: https://lore.kernel.org/r/20240305-rk3308-audio-codec-v4-6-312acdbe628f@bootlin.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -578,6 +578,48 @@
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#dma-cells = <1>;
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};
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/*
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* - can be clock producer or consumer
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* - up to 8 capture channels and 2 playback channels
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* - connected internally to audio codec
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*/
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i2s_8ch_2: i2s@ff320000 {
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compatible = "rockchip,rk3308-i2s-tdm";
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reg = <0x0 0xff320000 0x0 0x1000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "mclk_tx", "mclk_rx", "hclk";
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clocks = <&cru SCLK_I2S2_8CH_TX>,
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<&cru SCLK_I2S2_8CH_RX>,
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<&cru HCLK_I2S2_8CH>;
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dmas = <&dmac1 5>, <&dmac1 4>;
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dma-names = "rx", "tx";
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resets = <&cru SRST_I2S2_8CH_TX_M>, <&cru SRST_I2S2_8CH_RX_M>;
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reset-names = "tx-m", "rx-m";
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rockchip,grf = <&grf>;
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status = "disabled";
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};
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/*
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* - can be clock consumer only
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* - up to 4 capture channels, no playback
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* - connected internally to audio codec
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*/
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i2s_8ch_3: i2s@ff330000 {
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compatible = "rockchip,rk3308-i2s-tdm";
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reg = <0x0 0xff330000 0x0 0x1000>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "mclk_tx", "mclk_rx", "hclk";
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clocks = <&cru SCLK_I2S3_8CH_TX>,
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<&cru SCLK_I2S3_8CH_RX>,
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<&cru HCLK_I2S3_8CH>;
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dmas = <&dmac1 7>;
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dma-names = "rx";
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resets = <&cru SRST_I2S3_8CH_TX_M>, <&cru SRST_I2S3_8CH_RX_M>;
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reset-names = "tx-m", "rx-m";
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rockchip,grf = <&grf>;
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status = "disabled";
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};
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i2s_2ch_0: i2s@ff350000 {
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compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
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reg = <0x0 0xff350000 0x0 0x1000>;
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