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arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node

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Add Mali-G31 GPU node to SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211208104026.421-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2021-12-08 10:40:25 +00:00 committed by Geert Uytterhoeven
parent 88404c56fd
commit b6db8f72dd
1 changed files with 65 additions and 0 deletions
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65
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
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@ -112,6 +112,50 @@
};
};
gpu_opp_table: opp-table-1 {
compatible = "operating-points-v2";
opp-500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1100000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1100000>;
};
opp-250000000 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <1100000>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <1100000>;
};
opp-125000000 {
opp-hz = /bits/ 64 <125000000>;
opp-microvolt = <1100000>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <1100000>;
};
opp-62500000 {
opp-hz = /bits/ 64 <62500000>;
opp-microvolt = <1100000>;
};
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
opp-microvolt = <1100000>;
};
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
@ -638,6 +682,27 @@
dma-channels = <16>;
};
gpu: gpu@11840000 {
compatible = "renesas,r9a07g044-mali",
"arm,mali-bifrost";
reg = <0x0 0x11840000 0x0 0x10000>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu", "event";
clocks = <&cpg CPG_MOD R9A07G044_GPU_CLK>,
<&cpg CPG_MOD R9A07G044_GPU_AXI_CLK>,
<&cpg CPG_MOD R9A07G044_GPU_ACE_CLK>;
clock-names = "gpu", "bus", "bus_ace";
power-domains = <&cpg>;
resets = <&cpg R9A07G044_GPU_RESETN>,
<&cpg R9A07G044_GPU_AXI_RESETN>,
<&cpg R9A07G044_GPU_ACE_RESETN>;
reset-names = "rst", "axi_rst", "ace_rst";
operating-points-v2 = <&gpu_opp_table>;
};
gic: interrupt-controller@11900000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;