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clk: sprd: Fix thm_parents incorrect configuration

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The thm*_clk have two clock sources 32k and 250k,excluding 32m.

Fixes: af3bd36573 ("clk: sprd: Add clocks support for UMS512")
Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com>
Link: https://lore.kernel.org/r/20230824092624.20020-1-zhifeng.tang@unisoc.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Zhifeng Tang 2023-08-24 17:26:24 +08:00 committed by Stephen Boyd
parent eec11486d1
commit b7b20cfe6f
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/sprd/ums512-clk.c
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@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents,
0x250, 0, 3, UMS512_MUX_FLAG);
static const struct clk_parent_data thm_parents[] = {
{ .fw_name = "ext-32m" },
{ .fw_name = "ext-32k" },
{ .hw = &clk_250k.hw },
};
static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,