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pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1

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This driver supports both RZ/G2H and R-Car H3 ES2 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3 ES2
(R8A77951) is not enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201019124258.4574-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2020-10-19 13:42:53 +01:00 committed by Geert Uytterhoeven
parent 81f652afa6
commit b8029394ef
1 changed files with 12 additions and 2 deletions
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14
drivers/pinctrl/renesas/pfc-r8a77951.c
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@ -1827,6 +1827,7 @@ static const unsigned int canfd1_data_mux[] = {
CANFD1_TX_MARK, CANFD1_RX_MARK, CANFD1_TX_MARK, CANFD1_RX_MARK,
}; };
#ifdef CONFIG_PINCTRL_PFC_R8A77951
/* - DRIF0 --------------------------------------------------------------- */ /* - DRIF0 --------------------------------------------------------------- */
static const unsigned int drif0_ctrl_a_pins[] = { static const unsigned int drif0_ctrl_a_pins[] = {
/* CLK, SYNC */ /* CLK, SYNC */
@ -2041,6 +2042,7 @@ static const unsigned int drif3_data1_b_pins[] = {
static const unsigned int drif3_data1_b_mux[] = { static const unsigned int drif3_data1_b_mux[] = {
RIF3_D1_B_MARK, RIF3_D1_B_MARK,
}; };
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
/* - DU --------------------------------------------------------------------- */ /* - DU --------------------------------------------------------------------- */
static const unsigned int du_rgb666_pins[] = { static const unsigned int du_rgb666_pins[] = {
@ -4159,7 +4161,9 @@ static const unsigned int vin5_clk_mux[] = {
static const struct { static const struct {
struct sh_pfc_pin_group common[320]; struct sh_pfc_pin_group common[320];
#ifdef CONFIG_PINCTRL_PFC_R8A77951
struct sh_pfc_pin_group automotive[30]; struct sh_pfc_pin_group automotive[30];
#endif
} pinmux_groups = { } pinmux_groups = {
.common = { .common = {
SH_PFC_PIN_GROUP(audio_clk_a_a), SH_PFC_PIN_GROUP(audio_clk_a_a),
@ -4483,6 +4487,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clkenb),
SH_PFC_PIN_GROUP(vin5_clk), SH_PFC_PIN_GROUP(vin5_clk),
}, },
#ifdef CONFIG_PINCTRL_PFC_R8A77951
.automotive = { .automotive = {
SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(drif0_ctrl_a),
SH_PFC_PIN_GROUP(drif0_data0_a), SH_PFC_PIN_GROUP(drif0_data0_a),
@ -4515,7 +4520,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_data0_b), SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b), SH_PFC_PIN_GROUP(drif3_data1_b),
} }
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
}; };
static const char * const audio_clk_groups[] = { static const char * const audio_clk_groups[] = {
@ -4574,6 +4579,7 @@ static const char * const canfd1_groups[] = {
"canfd1_data", "canfd1_data",
}; };
#ifdef CONFIG_PINCTRL_PFC_R8A77951
static const char * const drif0_groups[] = { static const char * const drif0_groups[] = {
"drif0_ctrl_a", "drif0_ctrl_a",
"drif0_data0_a", "drif0_data0_a",
@ -4615,6 +4621,7 @@ static const char * const drif3_groups[] = {
"drif3_data0_b", "drif3_data0_b",
"drif3_data1_b", "drif3_data1_b",
}; };
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
static const char * const du_groups[] = { static const char * const du_groups[] = {
"du_rgb666", "du_rgb666",
@ -5041,7 +5048,9 @@ static const char * const vin5_groups[] = {
static const struct { static const struct {
struct sh_pfc_function common[53]; struct sh_pfc_function common[53];
#ifdef CONFIG_PINCTRL_PFC_R8A77951
struct sh_pfc_function automotive[4]; struct sh_pfc_function automotive[4];
#endif
} pinmux_functions = { } pinmux_functions = {
.common = { .common = {
SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(audio_clk),
@ -5098,13 +5107,14 @@ static const struct {
SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin4),
SH_PFC_FUNCTION(vin5), SH_PFC_FUNCTION(vin5),
}, },
#ifdef CONFIG_PINCTRL_PFC_R8A77951
.automotive = { .automotive = {
SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3), SH_PFC_FUNCTION(drif3),
} }
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
}; };
static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_cfg_reg pinmux_config_regs[] = {