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The Freescale arm64 device tree updates for 4.13:

Browse Source 
- A series from NXP employee Li Yang that updates the copyright claims
    to comply with company policy.
  - A patch-set from Madalin Bucur that adds Data Path Acceleration
    Architecture (DPAA) QBMan and FMan.  Quite a few .dtsi files are
    created for SoCs with different DPAA configuration to include the
    devices as needed.
  - Enable UHS-I SD and eMMC support for LS1046A and LS208xA RDB/QDS
    boards.
  - Enable TMU device for thermal management support on LS1088A.
  - Update SATA device node for LS1088A with correct compatible and ECC
    register bit.
  - A few small random device tree updates.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJZRpzyAAoJEFBXWFqHsHzOiB0H/2j7iQRVuiwINPE1VlIyWIrC
 GrBVcf3chm0R/9E87LtX0PdgX2FweKyQ6AHDK2A8zM68pavX70LGVRfKSYqFoVN8
 dEIAHhvNiLMVCPbxiuDtYSsWBSnWLM5+PEpy6pUSej9A/9m6KLyeX82+0QYL/tL0
 /DaN+vwVQm5GYi/5KiK3JQ765Vva435ImYf3+N15Jra5NXVDn4myInOOcvcX6zK+
 WtTckAyJT9e8KLfNA5UT39KbRRD8sZjlIF75TGu6RJGT1KWbU+atzEp1L9Nwgg51
 +5pW11vs5ADoqFiT6LdjGjFf1WJEphWbLoDknDr+QJJThi1mCMy2pU7xMVUF86I=
 =uI6T
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt64-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

The Freescale arm64 device tree updates for 4.13:
 - A series from NXP employee Li Yang that updates the copyright claims
   to comply with company policy.
 - A patch-set from Madalin Bucur that adds Data Path Acceleration
   Architecture (DPAA) QBMan and FMan.  Quite a few .dtsi files are
   created for SoCs with different DPAA configuration to include the
   devices as needed.
 - Enable UHS-I SD and eMMC support for LS1046A and LS208xA RDB/QDS
   boards.
 - Enable TMU device for thermal management support on LS1088A.
 - Update SATA device node for LS1088A with correct compatible and ECC
   register bit.
 - A few small random device tree updates.

* tag 'imx-dt64-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (22 commits)
  arm64: dts: ls1088a: update sata node
  dt-bindings: ahci-fsl-qoriq: add ls1088a chip name to the list
  arm64: dts: ls1012a: Add coreclk
  arm64: dts: ls1046a: Add dis_rxdet_inp3_quirk property to USB3 node
  arm64: dts: ls208xa: disable SD UHS-I modes by default on RDB
  arm64: dts: ls1043a: Add generic compatible string for I2C EEPROM
  arm64: dts: add LS1046A DPAA FMan nodes
  arm64: dts: add LS1043A DPAA FMan support
  arm64: dts: add DPAA FMan nodes
  arm64: dts: add LS1046A DPAA QBMan nodes
  arm64: dts: add LS1043A DPAA QBMan nodes
  arm64: dts: add DPAA QBMan portals
  arm64: dts: ls1088a: Add TMU device tree support
  arm64: dts: ls1088a: update the sata node
  arm64: dts: Add flash node for ls1088a qds and rdb
  arm64: dts: ls1088a: add esdhc node
  arm64: dts: ls1012a: add eSDHC nodes
  arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS
  arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB
  mmc: dt: add compatible into eSDHC required properties
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-06-18 23:07:59 -07:00
commit b87a08f962
38 changed files with 1192 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
View File

@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller
Required properties:
- reg: Physical base address and size of the controller's register area.
- compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
chip could be ls1021a, ls1043a, ls1046a, ls2080a etc.
chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
- clocks: Input clock specifier. Refer to common clock bindings.
- interrupts: Interrupt specifier. Refer to interrupt binding.

14
Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
View File

@ -7,6 +7,20 @@ This file documents differences between the core properties described
by mmc.txt and the properties used by the sdhci-esdhc driver.
Required properties:
- compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
Possible compatibles for PowerPC:
"fsl,mpc8536-esdhc"
"fsl,mpc8378-esdhc"
"fsl,p2020-esdhc"
"fsl,p4080-esdhc"
"fsl,t1040-esdhc"
"fsl,t4240-esdhc"
Possible compatibles for ARM:
"fsl,ls1012a-esdhc"
"fsl,ls1088a-esdhc"
"fsl,ls1043a-esdhc"
"fsl,ls1046a-esdhc"
"fsl,ls2080a-esdhc"
- interrupt-parent : interrupt source phandle.
- clock-frequency : specifies eSDHC base clock frequency.

2
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree file for Freescale LS1012A Freedom Board.
*
* Copyright 2016, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPLv2 or the X11 license, at your option. Note that this dual

10
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree file for Freescale LS1012A QDS Board.
*
* Copyright 2016, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPLv2 or the X11 license, at your option. Note that this dual
@ -97,6 +97,14 @@
status = "okay";
};
&esdhc0 {
status = "okay";
};
&esdhc1 {
status = "okay";
};
&i2c0 {
status = "okay";

15
arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree file for Freescale LS1012A RDB Board.
*
* Copyright 2016, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPLv2 or the X11 license, at your option. Note that this dual
@ -54,6 +54,19 @@
status = "okay";
};
&esdhc0 {
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
status = "okay";
};
&esdhc1 {
mmc-hs200-1_8v;
status = "okay";
};
&i2c0 {
status = "okay";
};

39
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-1012A family SoC.
*
* Copyright 2016, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPLv2 or the X11 license, at your option. Note that this dual
@ -76,10 +76,17 @@
sysclk: sysclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-frequency = <125000000>;
clock-output-names = "sysclk";
};
coreclk: coreclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-output-names = "coreclk";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
@ -117,12 +124,37 @@
#size-cells = <2>;
ranges;
esdhc0: esdhc@1560000 {
compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
reg = <0x0 0x1560000 0x0 0x10000>;
interrupts = <0 62 0x4>;
clocks = <&clockgen 4 0>;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
big-endian;
bus-width = <4>;
status = "disabled";
};
scfg: scfg@1570000 {
compatible = "fsl,ls1012a-scfg", "syscon";
reg = <0x0 0x1570000 0x0 0x10000>;
big-endian;
};
esdhc1: esdhc@1580000 {
compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
reg = <0x0 0x1580000 0x0 0x10000>;
interrupts = <0 65 0x4>;
clocks = <&clockgen 4 0>;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
big-endian;
broken-cd;
bus-width = <4>;
status = "disabled";
};
crypto: crypto@1700000 {
compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
"fsl,sec-v4.0";
@ -223,7 +255,8 @@
compatible = "fsl,ls1012a-clockgen";
reg = <0x0 0x1ee1000 0x0 0x1000>;
#clock-cells = <2>;
clocks = <&sysclk>;
clocks = <&sysclk &coreclk>;
clock-names = "sysclk", "coreclk";
};
tmu: tmu@1f00000 {

45
arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi Normal file
View File

@ -0,0 +1,45 @@
/*
* QorIQ FMan v3 device tree nodes for ls1043
*
* Copyright 2015-2016 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
&soc {
/* include used FMan blocks */
#include "qoriq-fman3-0.dtsi"
#include "qoriq-fman3-0-1g-0.dtsi"
#include "qoriq-fman3-0-1g-1.dtsi"
#include "qoriq-fman3-0-1g-2.dtsi"
#include "qoriq-fman3-0-1g-3.dtsi"
#include "qoriq-fman3-0-1g-4.dtsi"
#include "qoriq-fman3-0-1g-5.dtsi"
#include "qoriq-fman3-0-10g-0.dtsi"
};
&fman0 {
/* these aliases provide the FMan ports mapping */
enet0: ethernet@e0000 {
};
enet1: ethernet@e2000 {
};
enet2: ethernet@e4000 {
};
enet3: ethernet@e6000 {
};
enet4: ethernet@e8000 {
};
enet5: ethernet@ea000 {
};
enet6: ethernet@f0000 {
};
};

4
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015, Freescale Semiconductor
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*
@ -181,3 +181,5 @@
reg = <0>;
};
};
#include "fsl-ls1043-post.dtsi"

79
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015, Freescale Semiconductor
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*
@ -75,11 +75,11 @@
reg = <0x4c>;
};
eeprom@52 {
compatible = "at24,24c512";
compatible = "atmel,24c512";
reg = <0x52>;
};
eeprom@53 {
compatible = "at24,24c512";
compatible = "atmel,24c512";
reg = <0x53>;
};
rtc@68 {
@ -139,3 +139,76 @@
&duart1 {
status = "okay";
};
#include "fsl-ls1043-post.dtsi"
&fman0 {
ethernet@e0000 {
phy-handle = <&qsgmii_phy1>;
phy-connection-type = "qsgmii";
};
ethernet@e2000 {
phy-handle = <&qsgmii_phy2>;
phy-connection-type = "qsgmii";
};
ethernet@e4000 {
phy-handle = <&rgmii_phy1>;
phy-connection-type = "rgmii-txid";
};
ethernet@e6000 {
phy-handle = <&rgmii_phy2>;
phy-connection-type = "rgmii-txid";
};
ethernet@e8000 {
phy-handle = <&qsgmii_phy3>;
phy-connection-type = "qsgmii";
};
ethernet@ea000 {
phy-handle = <&qsgmii_phy4>;
phy-connection-type = "qsgmii";
};
ethernet@f0000 { /* 10GEC1 */
phy-handle = <&aqr105_phy>;
phy-connection-type = "xgmii";
};
mdio@fc000 {
rgmii_phy1: ethernet-phy@1 {
reg = <0x1>;
};
rgmii_phy2: ethernet-phy@2 {
reg = <0x2>;
};
qsgmii_phy1: ethernet-phy@4 {
reg = <0x4>;
};
qsgmii_phy2: ethernet-phy@5 {
reg = <0x5>;
};
qsgmii_phy3: ethernet-phy@6 {
reg = <0x6>;
};
qsgmii_phy4: ethernet-phy@7 {
reg = <0x7>;
};
};
mdio@fd000 {
aqr105_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 132 4>;
reg = <0x1>;
};
};
};

69
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015, Freescale Semiconductor
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*
@ -45,6 +45,7 @@
*/
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
compatible = "fsl,ls1043a";
@ -52,6 +53,17 @@
#address-cells = <2>;
#size-cells = <2>;
aliases {
fman0 = &fman0;
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
ethernet3 = &enet3;
ethernet4 = &enet4;
ethernet5 = &enet5;
ethernet6 = &enet6;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -106,6 +118,33 @@
/* DRAM space 1, size: 2GiB DRAM */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
compatible = "shared-dma-pool";
size = <0 0x1000000>;
alignment = <0 0x1000000>;
no-map;
};
qman_fqd: qman-fqd {
compatible = "shared-dma-pool";
size = <0 0x400000>;
alignment = <0 0x400000>;
no-map;
};
qman_pfdr: qman-pfdr {
compatible = "shared-dma-pool";
size = <0 0x2000000>;
alignment = <0 0x2000000>;
no-map;
};
};
sysclk: sysclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -152,7 +191,7 @@
interrupts = <1 9 0xf08>;
};
soc {
soc: soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@ -223,6 +262,7 @@
ifc: ifc@1530000 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x1530000 0x0 0x10000>;
big-endian;
interrupts = <0 43 0x4>;
};
@ -333,6 +373,28 @@
};
};
qman: qman@1880000 {
compatible = "fsl,qman";
reg = <0x0 0x1880000 0x0 0x10000>;
interrupts = <0 45 0x4>;
memory-region = <&qman_fqd &qman_pfdr>;
};
bman: bman@1890000 {
compatible = "fsl,bman";
reg = <0x0 0x1890000 0x0 0x10000>;
interrupts = <0 45 0x4>;
memory-region = <&bman_fbpr>;
};
bportals: bman-portals@508000000 {
ranges = <0x0 0x5 0x08000000 0x8000000>;
};
qportals: qman-portals@500000000 {
ranges = <0x0 0x5 0x00000000 0x8000000>;
};
dspi0: dspi@2100000 {
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
@ -688,3 +750,6 @@
};
};
#include "qoriq-qman-portals.dtsi"
#include "qoriq-bman-portals.dtsi"

48
arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi Normal file
View File

@ -0,0 +1,48 @@
/*
* QorIQ FMan v3 device tree nodes for ls1046
*
* Copyright 2015-2016 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
&soc {
/* include used FMan blocks */
#include "qoriq-fman3-0.dtsi"
#include "qoriq-fman3-0-1g-0.dtsi"
#include "qoriq-fman3-0-1g-1.dtsi"
#include "qoriq-fman3-0-1g-2.dtsi"
#include "qoriq-fman3-0-1g-3.dtsi"
#include "qoriq-fman3-0-1g-4.dtsi"
#include "qoriq-fman3-0-1g-5.dtsi"
#include "qoriq-fman3-0-10g-0.dtsi"
#include "qoriq-fman3-0-10g-1.dtsi"
};
&fman0 {
/* these aliases provide the FMan ports mapping */
enet0: ethernet@e0000 {
};
enet1: ethernet@e2000 {
};
enet2: ethernet@e4000 {
};
enet3: ethernet@e6000 {
};
enet4: ethernet@e8000 {
};
enet5: ethernet@ea000 {
};
enet6: ethernet@f0000 {
};
enet7: ethernet@f2000 {
};
};

4
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016, Freescale Semiconductor, Inc.
* Copyright 2016 Freescale Semiconductor, Inc.
*
* Shaohui Xie <Shaohui.Xie@nxp.com>
*
@ -210,3 +210,5 @@
reg = <0>;
};
};
#include "fsl-ls1046-post.dtsi"

70
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016, Freescale Semiconductor, Inc.
* Copyright 2016 Freescale Semiconductor, Inc.
*
* Mingkai Hu <mingkai.hu@nxp.com>
*
@ -72,6 +72,14 @@
status = "okay";
};
&esdhc {
mmc-hs200-1_8v;
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
};
&i2c0 {
status = "okay";
@ -148,3 +156,63 @@
reg = <1>;
};
};
#include "fsl-ls1046-post.dtsi"
&fman0 {
ethernet@e4000 {
phy-handle = <&rgmii_phy1>;
phy-connection-type = "rgmii";
};
ethernet@e6000 {
phy-handle = <&rgmii_phy2>;
phy-connection-type = "rgmii";
};
ethernet@e8000 {
phy-handle = <&sgmii_phy1>;
phy-connection-type = "sgmii";
};
ethernet@ea000 {
phy-handle = <&sgmii_phy2>;
phy-connection-type = "sgmii";
};
ethernet@f0000 { /* 10GEC1 */
phy-handle = <&aqr106_phy>;
phy-connection-type = "xgmii";
};
ethernet@f2000 { /* 10GEC2 */
fixed-link = <0 1 1000 0 0>;
phy-connection-type = "xgmii";
};
mdio@fc000 {
rgmii_phy1: ethernet-phy@1 {
reg = <0x1>;
};
rgmii_phy2: ethernet-phy@2 {
reg = <0x2>;
};
sgmii_phy1: ethernet-phy@3 {
reg = <0x3>;
};
sgmii_phy2: ethernet-phy@4 {
reg = <0x4>;
};
};
mdio@fd000 {
aqr106_phy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 131 4>;
reg = <0x0>;
};
};
};

75
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016, Freescale Semiconductor, Inc.
* Copyright 2016 Freescale Semiconductor, Inc.
*
* Mingkai Hu <mingkai.hu@nxp.com>
*
@ -55,6 +55,15 @@
aliases {
crypto = &crypto;
fman0 = &fman0;
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
ethernet3 = &enet3;
ethernet4 = &enet4;
ethernet5 = &enet5;
ethernet6 = &enet6;
ethernet7 = &enet7;
};
cpus {
@ -174,7 +183,7 @@
IRQ_TYPE_LEVEL_LOW)>;
};
soc {
soc: soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@ -190,6 +199,7 @@
ifc: ifc@1530000 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x1530000 0x0 0x10000>;
big-endian;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
};
@ -209,10 +219,10 @@
};
esdhc: esdhc@1560000 {
compatible = "fsl,esdhc";
compatible = "fsl,ls1046a-esdhc", "fsl,esdhc";
reg = <0x0 0x1560000 0x0 0x10000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>;
clocks = <&clockgen 2 1>;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
big-endian;
@ -268,6 +278,30 @@
};
};
qman: qman@1880000 {
compatible = "fsl,qman";
reg = <0x0 0x1880000 0x0 0x10000>;
interrupts = <0 45 0x4>;
memory-region = <&qman_fqd &qman_pfdr>;
};
bman: bman@1890000 {
compatible = "fsl,bman";
reg = <0x0 0x1890000 0x0 0x10000>;
interrupts = <0 45 0x4>;
memory-region = <&bman_fbpr>;
};
qportals: qman-portals@500000000 {
ranges = <0x0 0x5 0x00000000 0x8000000>;
};
bportals: bman-portals@508000000 {
ranges = <0x0 0x5 0x08000000 0x8000000>;
};
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x10000>;
@ -567,6 +601,7 @@
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
};
usb1: usb@3000000 {
@ -575,6 +610,7 @@
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
};
usb2: usb@3100000 {
@ -583,6 +619,7 @@
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
};
sata: sata@3200000 {
@ -594,4 +631,34 @@
clocks = <&clockgen 4 1>;
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
compatible = "shared-dma-pool";
size = <0 0x1000000>;
alignment = <0 0x1000000>;
no-map;
};
qman_fqd: qman-fqd {
compatible = "shared-dma-pool";
size = <0 0x800000>;
alignment = <0 0x800000>;
no-map;
};
qman_pfdr: qman-pfdr {
compatible = "shared-dma-pool";
size = <0 0x2000000>;
alignment = <0 0x2000000>;
no-map;
};
};
};
#include "qoriq-qman-portals.dtsi"
#include "qoriq-bman-portals.dtsi"

28
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
View File

@ -110,6 +110,30 @@
};
};
&ifc {
ranges = <0 0 0x5 0x80000000 0x08000000
2 0 0x5 0x30000000 0x00010000
3 0 0x5 0x20000000 0x00010000>;
status = "okay";
nor@0,0 {
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
};
nand@2,0 {
compatible = "fsl,ifc-nand";
reg = <0x2 0x0 0x10000>;
};
fpga: board-control@3,0 {
compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
reg = <0x3 0x0 0x0000100>;
};
};
&duart0 {
status = "okay";
};
@ -118,6 +142,10 @@
status = "okay";
};
&esdhc {
status = "okay";
};
&sata {
status = "okay";
};

20
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
View File

@ -94,6 +94,22 @@
};
};
&ifc {
ranges = <0 0 0x5 0x30000000 0x00010000
2 0 0x5 0x20000000 0x00010000>;
status = "okay";
nand@0,0 {
compatible = "fsl,ifc-nand";
reg = <0x0 0x0 0x10000>;
};
fpga: board-control@2,0 {
compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>;
};
};
&duart0 {
status = "okay";
};
@ -102,6 +118,10 @@
status = "okay";
};
&esdhc {
status = "okay";
};
&sata {
status = "okay";
};

111
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
View File

@ -44,6 +44,7 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "fsl,ls1088a";
@ -61,6 +62,7 @@
compatible = "arm,cortex-a53";
reg = <0x0>;
clocks = <&clockgen 1 0>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@ -89,6 +91,7 @@
compatible = "arm,cortex-a53";
reg = <0x100>;
clocks = <&clockgen 1 1>;
#cooling-cells = <2>;
};
cpu5: cpu@101 {
@ -153,6 +156,91 @@
clocks = <&sysclk>;
};
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
interrupts = <0 23 0x4>;
fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
fsl,tmu-calibration =
/* Calibration data group 1 */
<0x00000000 0x00000026
0x00000001 0x0000002d
0x00000002 0x00000032
0x00000003 0x00000039
0x00000004 0x0000003f
0x00000005 0x00000046
0x00000006 0x0000004d
0x00000007 0x00000054
0x00000008 0x0000005a
0x00000009 0x00000061
0x0000000a 0x0000006a
0x0000000b 0x00000071
/* Calibration data group 2 */
0x00010000 0x00000025
0x00010001 0x0000002c
0x00010002 0x00000035
0x00010003 0x0000003d
0x00010004 0x00000045
0x00010005 0x0000004e
0x00010006 0x00000057
0x00010007 0x00000061
0x00010008 0x0000006b
0x00010009 0x00000076
/* Calibration data group 3 */
0x00020000 0x00000029
0x00020001 0x00000033
0x00020002 0x0000003d
0x00020003 0x00000049
0x00020004 0x00000056
0x00020005 0x00000061
0x00020006 0x0000006d
/* Calibration data group 4 */
0x00030000 0x00000021
0x00030001 0x0000002a
0x00030002 0x0000003c
0x00030003 0x0000004e>;
little-endian;
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
duart0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;
@ -216,10 +304,6 @@
little-endian;
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x5 0x80000000 0x08000000
2 0 0x5 0x30000000 0x00010000
3 0 0x5 0x20000000 0x00010000>;
status = "disabled";
};
@ -263,11 +347,26 @@
status = "disabled";
};
esdhc: esdhc@2140000 {
compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
reg = <0x0 0x2140000 0x0 0x10000>;
interrupts = <0 28 0x4>; /* Level high type */
clock-frequency = <0>;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
little-endian;
bus-width = <4>;
status = "disabled";
};
sata: sata@3200000 {
compatible = "fsl,ls1088a-ahci", "fsl,ls1043a-ahci";
reg = <0x0 0x3200000 0x0 0x10000>;
compatible = "fsl,ls1088a-ahci";
reg = <0x0 0x3200000 0x0 0x10000>,
<0x7 0x100520 0x0 0x4>;
reg-names = "ahci", "sata-ecc";
interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 3>;
dma-coherent;
status = "disabled";
};
};

3
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
View File

@ -1,7 +1,8 @@
/*
* Device Tree file for Freescale LS2080a QDS Board.
*
* Copyright (C) 2015-17, Freescale Semiconductor
* Copyright 2015-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
* Bhupesh Sharma <bhupesh.sharma@freescale.com>

3
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
View File

@ -1,7 +1,8 @@
/*
* Device Tree file for Freescale LS2080a RDB Board.
*
* Copyright (C) 2016-17, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
* Bhupesh Sharma <bhupesh.sharma@freescale.com>

2
arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
View File

@ -1,7 +1,7 @@
/*
* Device Tree file for Freescale LS2080a software Simulator model
*
* Copyright (C) 2014-2015, Freescale Semiconductor
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*
* Bhupesh Sharma <bhupesh.sharma@freescale.com>
*

2
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
View File

@ -1,7 +1,7 @@
/*
* Device Tree Include file for Freescale Layerscape-2080A family SoC.
*
* Copyright (C) 2014-2016, Freescale Semiconductor
* Copyright 2014-2016 Freescale Semiconductor, Inc.
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
* Bhupesh Sharma <bhupesh.sharma@freescale.com>

3
arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
View File

@ -1,7 +1,8 @@
/*
* Device Tree file for Freescale LS2088A QDS Board.
*
* Copyright (C) 2016-17, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*

3
arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
View File

@ -1,7 +1,8 @@
/*
* Device Tree file for Freescale LS2088A RDB Board.
*
* Copyright (C) 2016-17, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*

3
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
View File

@ -1,7 +1,8 @@
/*
* Device Tree Include file for Freescale Layerscape-2088A family SoC.
*
* Copyright (C) 2016-17, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*

4
arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
View File

@ -1,7 +1,8 @@
/*
* Device Tree file for Freescale LS2080A QDS Board.
*
* Copyright (C) 2016-17, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*
@ -45,6 +46,7 @@
*/
&esdhc {
mmc-hs200-1_8v;
status = "okay";
};

3
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
View File

@ -1,7 +1,8 @@
/*
* Device Tree file for Freescale LS2080A RDB Board.
*
* Copyright (C) 2016-17, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*

5
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View File

@ -1,7 +1,8 @@
/*
* Device Tree Include file for Freescale Layerscape-2080A family SoC.
*
* Copyright (C) 2016-2017, Freescale Semiconductor
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*
@ -471,7 +472,7 @@
compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
reg = <0x0 0x2140000 0x0 0x10000>;
interrupts = <0 28 0x4>; /* Level high type */
clock-frequency = <0>; /* Updated by bootloader */
clocks = <&clockgen 4 1>;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
little-endian;

71
arch/arm64/boot/dts/freescale/qoriq-bman-portals.dtsi Normal file
View File

@ -0,0 +1,71 @@
/*
* QorIQ BMan Portals device tree
*
* Copyright 2011-2016 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
&bportals {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
bman-portal@0 {
/*
* bootloader fix-ups are expected to provide the
* "fsl,bman-portal-<hardware revision>" compatible
*/
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x4000000 0x4000>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x4010000 0x4000>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x4020000 0x4000>;
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@30000 {
compatible = "fsl,bman-portal";
reg = <0x30000 0x4000>, <0x4030000 0x4000>;
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@40000 {
compatible = "fsl,bman-portal";
reg = <0x40000 0x4000>, <0x4040000 0x4000>;
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@50000 {
compatible = "fsl,bman-portal";
reg = <0x50000 0x4000>, <0x4050000 0x4000>;
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@60000 {
compatible = "fsl,bman-portal";
reg = <0x60000 0x4000>, <0x4060000 0x4000>;
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@70000 {
compatible = "fsl,bman-portal";
reg = <0x70000 0x4000>, <0x4070000 0x4000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@80000 {
compatible = "fsl,bman-portal";
reg = <0x80000 0x4000>, <0x4080000 0x4000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
};
};

42
arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi Normal file
View File

@ -0,0 +1,42 @@
/*
* QorIQ FMan v3 10g port #0 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x10: port@90000 {
cell-index = <0x10>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x90000 0x1000>;
fsl,fman-10g-port;
};
fman0_tx_0x30: port@b0000 {
cell-index = <0x30>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xb0000 0x1000>;
fsl,fman-10g-port;
};
ethernet@f0000 {
cell-index = <0x8>;
compatible = "fsl,fman-memac";
reg = <0xf0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
pcsphy-handle = <&pcsphy6>;
};
mdio@f1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xf1000 0x1000>;
pcsphy6: ethernet-phy@0 {
reg = <0x0>;
};
};
};

42
arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi Normal file
View File

@ -0,0 +1,42 @@
/*
* QorIQ FMan v3 10g port #1 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x11: port@91000 {
cell-index = <0x11>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x91000 0x1000>;
fsl,fman-10g-port;
};
fman0_tx_0x31: port@b1000 {
cell-index = <0x31>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xb1000 0x1000>;
fsl,fman-10g-port;
};
ethernet@f2000 {
cell-index = <0x9>;
compatible = "fsl,fman-memac";
reg = <0xf2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
pcsphy-handle = <&pcsphy7>;
};
mdio@f3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xf3000 0x1000>;
pcsphy7: ethernet-phy@0 {
reg = <0x0>;
};
};
};

41
arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi Normal file
View File

@ -0,0 +1,41 @@
/*
* QorIQ FMan v3 1g port #0 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x08: port@88000 {
cell-index = <0x8>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x88000 0x1000>;
};
fman0_tx_0x28: port@a8000 {
cell-index = <0x28>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa8000 0x1000>;
};
ethernet@e0000 {
cell-index = <0>;
compatible = "fsl,fman-memac";
reg = <0xe0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy0>;
};
mdio@e1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe1000 0x1000>;
pcsphy0: ethernet-phy@0 {
reg = <0x0>;
};
};
};

41
arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi Normal file
View File

@ -0,0 +1,41 @@
/*
* QorIQ FMan v3 1g port #1 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x09: port@89000 {
cell-index = <0x9>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x89000 0x1000>;
};
fman0_tx_0x29: port@a9000 {
cell-index = <0x29>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa9000 0x1000>;
};
ethernet@e2000 {
cell-index = <1>;
compatible = "fsl,fman-memac";
reg = <0xe2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy1>;
};
mdio@e3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe3000 0x1000>;
pcsphy1: ethernet-phy@0 {
reg = <0x0>;
};
};
};

41
arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi Normal file
View File

@ -0,0 +1,41 @@
/*
* QorIQ FMan v3 1g port #2 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x0a: port@8a000 {
cell-index = <0xa>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8a000 0x1000>;
};
fman0_tx_0x2a: port@aa000 {
cell-index = <0x2a>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xaa000 0x1000>;
};
ethernet@e4000 {
cell-index = <2>;
compatible = "fsl,fman-memac";
reg = <0xe4000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy2>;
};
mdio@e5000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe5000 0x1000>;
pcsphy2: ethernet-phy@0 {
reg = <0x0>;
};
};
};

41
arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi Normal file
View File

@ -0,0 +1,41 @@
/*
* QorIQ FMan v3 1g port #3 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x0b: port@8b000 {
cell-index = <0xb>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8b000 0x1000>;
};
fman0_tx_0x2b: port@ab000 {
cell-index = <0x2b>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xab000 0x1000>;
};
ethernet@e6000 {
cell-index = <3>;
compatible = "fsl,fman-memac";
reg = <0xe6000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy3>;
};
mdio@e7000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe7000 0x1000>;
pcsphy3: ethernet-phy@0 {
reg = <0x0>;
};
};
};

41
arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi Normal file
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@ -0,0 +1,41 @@
/*
* QorIQ FMan v3 1g port #4 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x0c: port@8c000 {
cell-index = <0xc>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8c000 0x1000>;
};
fman0_tx_0x2c: port@ac000 {
cell-index = <0x2c>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xac000 0x1000>;
};
ethernet@e8000 {
cell-index = <4>;
compatible = "fsl,fman-memac";
reg = <0xe8000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy4>;
};
mdio@e9000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe9000 0x1000>;
pcsphy4: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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/*
* QorIQ FMan v3 1g port #5 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman@1a00000 {
fman0_rx_0x0d: port@8d000 {
cell-index = <0xd>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8d000 0x1000>;
};
fman0_tx_0x2d: port@ad000 {
cell-index = <0x2d>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xad000 0x1000>;
};
ethernet@ea000 {
cell-index = <5>;
compatible = "fsl,fman-memac";
reg = <0xea000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy5>;
};
mdio@eb000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xeb000 0x1000>;
pcsphy5: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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/*
* QorIQ FMan v3 device tree
*
* Copyright 2012-2015 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
fman0: fman@1a00000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
compatible = "fsl,fman";
ranges = <0x0 0x0 0x1a00000 0x100000>;
reg = <0x0 0x1a00000 0x0 0x100000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 3 0>;
clock-names = "fmanclk";
fsl,qman-channel-range = <0x800 0x10>;
muram@0 {
compatible = "fsl,fman-muram";
reg = <0x0 0x60000>;
};
fman0_oh_0x2: port@82000 {
cell-index = <0x2>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x82000 0x1000>;
};
fman0_oh_0x3: port@83000 {
cell-index = <0x3>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x83000 0x1000>;
};
fman0_oh_0x4: port@84000 {
cell-index = <0x4>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x84000 0x1000>;
};
fman0_oh_0x5: port@85000 {
cell-index = <0x5>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x85000 0x1000>;
};
fman0_oh_0x6: port@86000 {
cell-index = <0x6>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x86000 0x1000>;
};
fman0_oh_0x7: port@87000 {
cell-index = <0x7>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x87000 0x1000>;
};
mdio0: mdio@fc000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfc000 0x1000>;
};
xmdio0: mdio@fd000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfd000 0x1000>;
};
ptp_timer0: ptp-timer@fe000 {
compatible = "fsl,fman-ptp-timer";
reg = <0xfe000 0x1000>;
};
};

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/*
* QorIQ QMan Portals device tree
*
* Copyright 2011-2016 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
*/
&qportals {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
qportal0: qman-portal@0 {
/*
* bootloader fix-ups are expected to provide the
* "fsl,bman-portal-<hardware revision>" compatible
*/
compatible = "fsl,qman-portal";
reg = <0x0 0x4000>, <0x4000000 0x4000>;
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <0>;
};
qportal1: qman-portal@10000 {
compatible = "fsl,qman-portal";
reg = <0x10000 0x4000>, <0x4010000 0x4000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <1>;
};
qportal2: qman-portal@20000 {
compatible = "fsl,qman-portal";
reg = <0x20000 0x4000>, <0x4020000 0x4000>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <2>;
};
qportal3: qman-portal@30000 {
compatible = "fsl,qman-portal";
reg = <0x30000 0x4000>, <0x4030000 0x4000>;
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <3>;
};
qportal4: qman-portal@40000 {
compatible = "fsl,qman-portal";
reg = <0x40000 0x4000>, <0x4040000 0x4000>;
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <4>;
};
qportal5: qman-portal@50000 {
compatible = "fsl,qman-portal";
reg = <0x50000 0x4000>, <0x4050000 0x4000>;
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <5>;
};
qportal6: qman-portal@60000 {
compatible = "fsl,qman-portal";
reg = <0x60000 0x4000>, <0x4060000 0x4000>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <6>;
};
qportal7: qman-portal@70000 {
compatible = "fsl,qman-portal";
reg = <0x70000 0x4000>, <0x4070000 0x4000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <7>;
};
qportal8: qman-portal@80000 {
compatible = "fsl,qman-portal";
reg = <0x80000 0x4000>, <0x4080000 0x4000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <8>;
};
};