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drm/i915/audio: Remove CL/BLC audio stuff

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We don't use the audio code on crestline (CL) since it doesn't
support native HDMI output, and SDVO has it's own way of doing
audio.

And Bearlake-C (BLC) doesn't even exist in the real world, so
no point it trying to deal with it.

Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Cc: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Cc: Takashi Iwai <tiwai@suse.de>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221026170150.2654-4-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2022-10-26 20:01:38 +03:00
parent 0ff6b8eafd
commit b87a9a128b
2 changed files with 6 additions and 25 deletions
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23
drivers/gpu/drm/i915/display/intel_audio.c
View File

@ -336,17 +336,11 @@ static void g4x_audio_codec_disable(struct intel_encoder *encoder,
const struct drm_connector_state *old_conn_state)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
u32 eldv, tmp;
tmp = intel_de_read(i915, G4X_AUD_VID_DID);
if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL)
eldv = G4X_ELDV_DEVCL_DEVBLC;
else
eldv = G4X_ELDV_DEVCTG;
u32 tmp;
/* Invalidate ELD */
tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
tmp &= ~eldv;
tmp &= ~G4X_ELDV;
intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
}
@ -357,24 +351,17 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder,
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct drm_connector *connector = conn_state->connector;
const u8 *eld = connector->eld;
u32 eldv;
u32 tmp;
int len, i;
tmp = intel_de_read(i915, G4X_AUD_VID_DID);
if (tmp == INTEL_AUDIO_DEVBLC || tmp == INTEL_AUDIO_DEVCL)
eldv = G4X_ELDV_DEVCL_DEVBLC;
else
eldv = G4X_ELDV_DEVCTG;
if (intel_eld_uptodate(connector,
G4X_AUD_CNTL_ST, eldv,
G4X_AUD_CNTL_ST, G4X_ELDV,
G4X_AUD_CNTL_ST, G4X_ELD_ADDR_MASK,
G4X_HDMIW_HDMIEDID))
return;
tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
tmp &= ~(eldv | G4X_ELD_ADDR_MASK);
tmp &= ~(G4X_ELDV | G4X_ELD_ADDR_MASK);
len = (tmp >> 9) & 0x1f; /* ELD buffer size */
intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
@ -384,7 +371,7 @@ static void g4x_audio_codec_enable(struct intel_encoder *encoder,
*((const u32 *)eld + i));
tmp = intel_de_read(i915, G4X_AUD_CNTL_ST);
tmp |= eldv;
tmp |= G4X_ELDV;
intel_de_write(i915, G4X_AUD_CNTL_ST, tmp);
}

8
drivers/gpu/drm/i915/display/intel_audio_regs.h
View File

@ -8,14 +8,8 @@
#include "i915_reg_defs.h"
#define G4X_AUD_VID_DID _MMIO(DISPLAY_MMIO_BASE(i915) + 0x62020)
#define INTEL_AUDIO_DEVCL 0x808629FB
#define INTEL_AUDIO_DEVBLC 0x80862801
#define INTEL_AUDIO_DEVCTG 0x80862802
#define G4X_AUD_CNTL_ST _MMIO(0x620B4)
#define G4X_ELDV_DEVCL_DEVBLC (1 << 13)
#define G4X_ELDV_DEVCTG (1 << 14)
#define G4X_ELDV (1 << 14)
#define G4X_ELD_ADDR_MASK (0xf << 5)
#define G4X_ELD_ACK (1 << 4)
#define G4X_HDMIW_HDMIEDID _MMIO(0x6210C)