drm-misc-next for v6.5:
UAPI Changes: Cross-subsystem Changes: * fbdev: Move framebuffer I/O helpers to <asm/fb.h>, fix naming * firmware: Init sysfb as early as possible Core Changes: * DRM scheduler: Rename interfaces * ttm: Store ttm_device_funcs in .rodata * Replace strlcpy() with strscpy() in various places * Cleanups Driver Changes: * bridge: analogix: Fix endless probe loop; samsung-dsim: Support swapping clock/data polarity; tc358767: Use devm_ Cleanups; * gma500: Fix I/O-memory access * panel: boe-tv101wum-nl6: Improve initialization; sharp-ls043t1le001: Mode fixes; simple: Add BOE EV121WXM-N10-1850 plus DT bindings; AddS6D7AA0 plus DT bindings; Cleanups * ssd1307x: Style fixes * sun4i: Release clocks * msm: Fix I/O-memory access * nouveau: Cleanups * shmobile: Support Renesas; Enable framebuffer console; Various fixes * vkms: Fix RGB565 conversion -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEchf7rIzpz2NEoWjlaA3BHVMLeiMFAmRuBXEACgkQaA3BHVML eiPLkwgAqCa7IuSDQhFMWVOI0EJpPPEHtHM8SCT1Pp8aniXk23Ru+E16c5zck53O uf4tB+zoFrwD9npy60LIvX1OZmXS1KI4+ZO8itYFk6GSjxqbTWbjNFREBeWFdIpa OG54nEqjFQZzEXY+gJYDpu5zqLy3xLN07ZgQkcMyfW3O/Krj4LLzfQTDl+jP5wkO 7/v5Eu5CG5QjupMxIjb4e+ruUflp73pynur5bhZsfS1bPNGFTnxHlwg7NWnBXU7o Hg23UYfCuZZWPmuO26EeUDlN33rCoaycmVgtpdZft2eznca5Mg74Loz1Qc3GQfjw LLvKsAIlBcZvEIhElkzhtXitBoe7LQ== =/9zV -----END PGP SIGNATURE----- Merge tag 'drm-misc-next-2023-05-24' of git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v6.5: UAPI Changes: Cross-subsystem Changes: * fbdev: Move framebuffer I/O helpers to <asm/fb.h>, fix naming * firmware: Init sysfb as early as possible Core Changes: * DRM scheduler: Rename interfaces * ttm: Store ttm_device_funcs in .rodata * Replace strlcpy() with strscpy() in various places * Cleanups Driver Changes: * bridge: analogix: Fix endless probe loop; samsung-dsim: Support swapping clock/data polarity; tc358767: Use devm_ Cleanups; * gma500: Fix I/O-memory access * panel: boe-tv101wum-nl6: Improve initialization; sharp-ls043t1le001: Mode fixes; simple: Add BOE EV121WXM-N10-1850 plus DT bindings; AddS6D7AA0 plus DT bindings; Cleanups * ssd1307x: Style fixes * sun4i: Release clocks * msm: Fix I/O-memory access * nouveau: Cleanups * shmobile: Support Renesas; Enable framebuffer console; Various fixes * vkms: Fix RGB565 conversion Signed-off-by: Dave Airlie <airlied@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEchf7rIzpz2NEoWjlaA3BHVMLeiMFAmRuBXEACgkQaA3BHVML # eiPLkwgAqCa7IuSDQhFMWVOI0EJpPPEHtHM8SCT1Pp8aniXk23Ru+E16c5zck53O # uf4tB+zoFrwD9npy60LIvX1OZmXS1KI4+ZO8itYFk6GSjxqbTWbjNFREBeWFdIpa # OG54nEqjFQZzEXY+gJYDpu5zqLy3xLN07ZgQkcMyfW3O/Krj4LLzfQTDl+jP5wkO # 7/v5Eu5CG5QjupMxIjb4e+ruUflp73pynur5bhZsfS1bPNGFTnxHlwg7NWnBXU7o # Hg23UYfCuZZWPmuO26EeUDlN33rCoaycmVgtpdZft2eznca5Mg74Loz1Qc3GQfjw # LLvKsAIlBcZvEIhElkzhtXitBoe7LQ== # =/9zV # -----END PGP SIGNATURE----- # gpg: Signature made Wed 24 May 2023 22:39:13 AEST # gpg: using RSA key 7217FBAC8CE9CF6344A168E5680DC11D530B7A23 # gpg: Can't check signature: No public key # Conflicts: # MAINTAINERS From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230524124237.GA25416@linux-uq9g
This commit is contained in:
commit
b8887e796e
@ -105,6 +105,29 @@ properties:
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DSI output port node to the panel or the next bridge
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in the chain.
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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||||
|
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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uniqueItems: true
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items:
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enum: [ 1, 2, 3, 4 ]
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lane-polarities:
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minItems: 1
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maxItems: 5
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description:
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The Samsung MIPI DSI IP requires that all the data lanes have
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the same polarity.
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dependencies:
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lane-polarities: [data-lanes]
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required:
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- clock-names
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- clocks
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|
@ -4,16 +4,24 @@
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$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358767.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba TC358767 eDP bridge
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title: Toshiba TC358767/TC358867/TC9595 DSI/DPI/eDP bridge
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maintainers:
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- Andrey Gusakov <andrey.gusakov@cogentembedded.com>
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description: The TC358767 is bridge device which converts DSI/DPI to eDP/DP
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description: |
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The TC358767/TC358867/TC9595 is bridge device which
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converts DSI/DPI to eDP/DP .
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properties:
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compatible:
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const: toshiba,tc358767
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oneOf:
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- items:
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- enum:
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- toshiba,tc358867
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- toshiba,tc9595
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- const: toshiba,tc358767
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- const: toshiba,tc358767
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reg:
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enum:
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|
@ -77,6 +77,8 @@ properties:
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- auo,t215hvn01
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# Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel
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- avic,tm070ddh03
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# BOE EV121WXM-N10-1850 12.1" WXGA (1280x800) TFT LCD panel
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- boe,ev121wxm-n10-1850
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# BOE HV070WSA-100 7.01" WSVGA TFT LCD panel
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- boe,hv070wsa-100
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# BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel
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|
@ -0,0 +1,70 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/panel/samsung,s6d7aa0.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung S6D7AA0 MIPI-DSI LCD panel controller
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maintainers:
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- Artur Weber <aweber.kernel@gmail.com>
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allOf:
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- $ref: panel-common.yaml#
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properties:
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compatible:
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items:
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- enum:
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# 1280x800 LSL080AL02 panel
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- samsung,lsl080al02
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# 1024x768 LSL080AL03 panel
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- samsung,lsl080al03
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# 1024x768 LTL101AT01 panel
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- samsung,ltl101at01
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- const: samsung,s6d7aa0
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reg: true
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backlight:
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description:
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Backlight to use for the panel. If this property is set on panels
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that have DSI-based backlight control (LSL080AL03 and LTL101AT01),
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it overrides the DSI-based backlight.
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reset-gpios:
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description: Reset GPIO pin, usually GPIO_ACTIVE_LOW.
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power-supply:
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description:
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Main power supply for the panel; the exact voltage differs between
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panels, and is usually somewhere around 3.3-5v.
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vmipi-supply:
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description: VMIPI supply, usually 1.8v.
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required:
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- compatible
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- reg
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- reset-gpios
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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dsi {
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#address-cells = <1>;
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#size-cells = <0>;
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panel@0 {
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compatible = "samsung,lsl080al02", "samsung,s6d7aa0";
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reg = <0>;
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power-supply = <&display_3v3_supply>;
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reset-gpios = <&gpf0 4 GPIO_ACTIVE_LOW>;
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backlight = <&backlight>;
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};
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};
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...
|
@ -6691,6 +6691,12 @@ S: Maintained
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F: Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml
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F: drivers/gpu/drm/panel/panel-samsung-s6d27a1.c
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DRM DRIVER FOR SAMSUNG S6D7AA0 PANELS
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M: Artur Weber <aweber.kernel@gmail.com>
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S: Maintained
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F: Documentation/devicetree/bindings/display/panel/samsung,s6d7aa0.yaml
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F: drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c
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|
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DRM DRIVER FOR SITRONIX ST7586 PANELS
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M: David Lechner <david@lechnology.com>
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S: Maintained
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|
@ -2,7 +2,9 @@
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||||
#ifndef _ASM_FB_H_
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#define _ASM_FB_H_
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#include <linux/compiler.h>
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#include <linux/efi.h>
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#include <linux/string.h>
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#include <asm/page.h>
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@ -18,6 +20,24 @@ static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
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}
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#define fb_pgprotect fb_pgprotect
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static inline void fb_memcpy_fromio(void *to, const volatile void __iomem *from, size_t n)
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{
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memcpy(to, (void __force *)from, n);
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}
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#define fb_memcpy_fromio fb_memcpy_fromio
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static inline void fb_memcpy_toio(volatile void __iomem *to, const void *from, size_t n)
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{
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memcpy((void __force *)to, from, n);
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}
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#define fb_memcpy_toio fb_memcpy_toio
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static inline void fb_memset_io(volatile void __iomem *addr, int c, size_t n)
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{
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memset((void __force *)addr, c, n);
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}
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#define fb_memset fb_memset_io
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#include <asm-generic/fb.h>
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#endif /* _ASM_FB_H_ */
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|
@ -5,6 +5,27 @@
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||||
#ifndef _ASM_FB_H_
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#define _ASM_FB_H_
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#include <linux/compiler.h>
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#include <linux/string.h>
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static inline void fb_memcpy_fromio(void *to, const volatile void __iomem *from, size_t n)
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{
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memcpy(to, (void __force *)from, n);
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}
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#define fb_memcpy_fromio fb_memcpy_fromio
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static inline void fb_memcpy_toio(volatile void __iomem *to, const void *from, size_t n)
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{
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memcpy((void __force *)to, from, n);
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}
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#define fb_memcpy_toio fb_memcpy_toio
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static inline void fb_memset_io(volatile void __iomem *addr, int c, size_t n)
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{
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memset((void __force *)addr, c, n);
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||||
}
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#define fb_memset fb_memset_io
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||||
#include <asm-generic/fb.h>
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||||
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||||
#endif /* _ASM_FB_H_ */
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|
@ -12,6 +12,28 @@ static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
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}
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#define fb_pgprotect fb_pgprotect
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/*
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* MIPS doesn't define __raw_ I/O macros, so the helpers
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* in <asm-generic/fb.h> don't generate fb_readq() and
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* fb_write(). We have to provide them here.
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*
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* TODO: Convert MIPS to generic I/O. The helpers below can
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* then be removed.
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*/
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#ifdef CONFIG_64BIT
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static inline u64 fb_readq(const volatile void __iomem *addr)
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{
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return __raw_readq(addr);
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}
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#define fb_readq fb_readq
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static inline void fb_writeq(u64 b, volatile void __iomem *addr)
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||||
{
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__raw_writeq(b, addr);
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}
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#define fb_writeq fb_writeq
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||||
#endif
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||||
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||||
#include <asm-generic/fb.h>
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#endif /* _ASM_FB_H_ */
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|
@ -5,10 +5,9 @@
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* Copyright (C) 2001-2002 Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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*/
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#include <linux/fb.h>
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#include <linux/module.h>
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#include <asm/fb.h>
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#include <video/sticore.h>
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||||
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||||
int fb_is_primary_device(struct fb_info *info)
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|
@ -2,6 +2,8 @@
|
||||
#ifndef _SPARC_FB_H_
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||||
#define _SPARC_FB_H_
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||||
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||||
#include <linux/io.h>
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||||
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||||
struct fb_info;
|
||||
struct file;
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struct vm_area_struct;
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@ -16,6 +18,24 @@ static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
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int fb_is_primary_device(struct fb_info *info);
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||||
#define fb_is_primary_device fb_is_primary_device
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||||
|
||||
static inline void fb_memcpy_fromio(void *to, const volatile void __iomem *from, size_t n)
|
||||
{
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||||
sbus_memcpy_fromio(to, from, n);
|
||||
}
|
||||
#define fb_memcpy_fromio fb_memcpy_fromio
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||||
|
||||
static inline void fb_memcpy_toio(volatile void __iomem *to, const void *from, size_t n)
|
||||
{
|
||||
sbus_memcpy_toio(to, from, n);
|
||||
}
|
||||
#define fb_memcpy_toio fb_memcpy_toio
|
||||
|
||||
static inline void fb_memset_io(volatile void __iomem *addr, int c, size_t n)
|
||||
{
|
||||
sbus_memset_io(addr, c, n);
|
||||
}
|
||||
#define fb_memset fb_memset_io
|
||||
|
||||
#include <asm-generic/fb.h>
|
||||
|
||||
#endif /* _SPARC_FB_H_ */
|
||||
|
@ -4,7 +4,6 @@
|
||||
#include <linux/fb.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <asm/fb.h>
|
||||
#include <asm/prom.h>
|
||||
|
||||
int fb_is_primary_device(struct fb_info *info)
|
||||
|
@ -7,8 +7,6 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#include <asm/fb.h>
|
||||
|
||||
#include <linux/fb.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pci.h>
|
||||
|
@ -85,7 +85,7 @@ static struct sync_timeline *sync_timeline_create(const char *name)
|
||||
|
||||
kref_init(&obj->kref);
|
||||
obj->context = dma_fence_context_alloc(1);
|
||||
strlcpy(obj->name, name, sizeof(obj->name));
|
||||
strscpy(obj->name, name, sizeof(obj->name));
|
||||
|
||||
obj->pt_tree = RB_ROOT;
|
||||
INIT_LIST_HEAD(&obj->pt_list);
|
||||
|
@ -128,4 +128,4 @@ unlock_mutex:
|
||||
}
|
||||
|
||||
/* must execute after PCI subsystem for EFI quirks */
|
||||
device_initcall(sysfb_init);
|
||||
subsys_initcall_sync(sysfb_init);
|
||||
|
@ -1686,6 +1686,14 @@ static int anx7625_parse_dt(struct device *dev,
|
||||
if (of_property_read_bool(np, "analogix,audio-enable"))
|
||||
pdata->audio_en = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int anx7625_parse_dt_panel(struct device *dev,
|
||||
struct anx7625_platform_data *pdata)
|
||||
{
|
||||
struct device_node *np = dev->of_node;
|
||||
|
||||
pdata->panel_bridge = devm_drm_of_get_bridge(dev, np, 1, 0);
|
||||
if (IS_ERR(pdata->panel_bridge)) {
|
||||
if (PTR_ERR(pdata->panel_bridge) == -ENODEV) {
|
||||
@ -2031,7 +2039,7 @@ static int anx7625_register_audio(struct device *dev, struct anx7625_data *ctx)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int anx7625_attach_dsi(struct anx7625_data *ctx)
|
||||
static int anx7625_setup_dsi_device(struct anx7625_data *ctx)
|
||||
{
|
||||
struct mipi_dsi_device *dsi;
|
||||
struct device *dev = &ctx->client->dev;
|
||||
@ -2041,9 +2049,6 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx)
|
||||
.channel = 0,
|
||||
.node = NULL,
|
||||
};
|
||||
int ret;
|
||||
|
||||
DRM_DEV_DEBUG_DRIVER(dev, "attach dsi\n");
|
||||
|
||||
host = of_find_mipi_dsi_host_by_node(ctx->pdata.mipi_host_node);
|
||||
if (!host) {
|
||||
@ -2064,14 +2069,24 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx)
|
||||
MIPI_DSI_MODE_VIDEO_HSE |
|
||||
MIPI_DSI_HS_PKT_END_ALIGNED;
|
||||
|
||||
ret = devm_mipi_dsi_attach(dev, dsi);
|
||||
ctx->dsi = dsi;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int anx7625_attach_dsi(struct anx7625_data *ctx)
|
||||
{
|
||||
struct device *dev = &ctx->client->dev;
|
||||
int ret;
|
||||
|
||||
DRM_DEV_DEBUG_DRIVER(dev, "attach dsi\n");
|
||||
|
||||
ret = devm_mipi_dsi_attach(dev, ctx->dsi);
|
||||
if (ret) {
|
||||
DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ctx->dsi = dsi;
|
||||
|
||||
DRM_DEV_DEBUG_DRIVER(dev, "attach dsi succeeded.\n");
|
||||
|
||||
return 0;
|
||||
@ -2559,6 +2574,40 @@ static void anx7625_runtime_disable(void *data)
|
||||
pm_runtime_disable(data);
|
||||
}
|
||||
|
||||
static int anx7625_link_bridge(struct drm_dp_aux *aux)
|
||||
{
|
||||
struct anx7625_data *platform = container_of(aux, struct anx7625_data, aux);
|
||||
struct device *dev = aux->dev;
|
||||
int ret;
|
||||
|
||||
ret = anx7625_parse_dt_panel(dev, &platform->pdata);
|
||||
if (ret) {
|
||||
DRM_DEV_ERROR(dev, "fail to parse DT for panel : %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform->bridge.funcs = &anx7625_bridge_funcs;
|
||||
platform->bridge.of_node = dev->of_node;
|
||||
if (!anx7625_of_panel_on_aux_bus(dev))
|
||||
platform->bridge.ops |= DRM_BRIDGE_OP_EDID;
|
||||
if (!platform->pdata.panel_bridge)
|
||||
platform->bridge.ops |= DRM_BRIDGE_OP_HPD |
|
||||
DRM_BRIDGE_OP_DETECT;
|
||||
platform->bridge.type = platform->pdata.panel_bridge ?
|
||||
DRM_MODE_CONNECTOR_eDP :
|
||||
DRM_MODE_CONNECTOR_DisplayPort;
|
||||
|
||||
drm_bridge_add(&platform->bridge);
|
||||
|
||||
if (!platform->pdata.is_dpi) {
|
||||
ret = anx7625_attach_dsi(platform);
|
||||
if (ret)
|
||||
drm_bridge_remove(&platform->bridge);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int anx7625_i2c_probe(struct i2c_client *client)
|
||||
{
|
||||
struct anx7625_data *platform;
|
||||
@ -2633,6 +2682,24 @@ static int anx7625_i2c_probe(struct i2c_client *client)
|
||||
platform->aux.wait_hpd_asserted = anx7625_wait_hpd_asserted;
|
||||
drm_dp_aux_init(&platform->aux);
|
||||
|
||||
ret = anx7625_parse_dt(dev, pdata);
|
||||
if (ret) {
|
||||
if (ret != -EPROBE_DEFER)
|
||||
DRM_DEV_ERROR(dev, "fail to parse DT : %d\n", ret);
|
||||
goto free_wq;
|
||||
}
|
||||
|
||||
if (!platform->pdata.is_dpi) {
|
||||
ret = anx7625_setup_dsi_device(platform);
|
||||
if (ret < 0)
|
||||
goto free_wq;
|
||||
}
|
||||
|
||||
/*
|
||||
* Registering the i2c devices will retrigger deferred probe, so it
|
||||
* needs to be done after calls that might return EPROBE_DEFER,
|
||||
* otherwise we can get an infinite loop.
|
||||
*/
|
||||
if (anx7625_register_i2c_dummy_clients(platform, client) != 0) {
|
||||
ret = -ENOMEM;
|
||||
DRM_DEV_ERROR(dev, "fail to reserve I2C bus.\n");
|
||||
@ -2647,13 +2714,21 @@ static int anx7625_i2c_probe(struct i2c_client *client)
|
||||
if (ret)
|
||||
goto free_wq;
|
||||
|
||||
devm_of_dp_aux_populate_ep_devices(&platform->aux);
|
||||
|
||||
ret = anx7625_parse_dt(dev, pdata);
|
||||
/*
|
||||
* Populating the aux bus will retrigger deferred probe, so it needs to
|
||||
* be done after calls that might return EPROBE_DEFER, otherwise we can
|
||||
* get an infinite loop.
|
||||
*/
|
||||
ret = devm_of_dp_aux_populate_bus(&platform->aux, anx7625_link_bridge);
|
||||
if (ret) {
|
||||
if (ret != -EPROBE_DEFER)
|
||||
DRM_DEV_ERROR(dev, "fail to parse DT : %d\n", ret);
|
||||
goto free_wq;
|
||||
if (ret != -ENODEV) {
|
||||
DRM_DEV_ERROR(dev, "failed to populate aux bus : %d\n", ret);
|
||||
goto free_wq;
|
||||
}
|
||||
|
||||
ret = anx7625_link_bridge(&platform->aux);
|
||||
if (ret)
|
||||
goto free_wq;
|
||||
}
|
||||
|
||||
if (!platform->pdata.low_power_mode) {
|
||||
@ -2666,27 +2741,6 @@ static int anx7625_i2c_probe(struct i2c_client *client)
|
||||
if (platform->pdata.intp_irq)
|
||||
queue_work(platform->workqueue, &platform->work);
|
||||
|
||||
platform->bridge.funcs = &anx7625_bridge_funcs;
|
||||
platform->bridge.of_node = client->dev.of_node;
|
||||
if (!anx7625_of_panel_on_aux_bus(&client->dev))
|
||||
platform->bridge.ops |= DRM_BRIDGE_OP_EDID;
|
||||
if (!platform->pdata.panel_bridge)
|
||||
platform->bridge.ops |= DRM_BRIDGE_OP_HPD |
|
||||
DRM_BRIDGE_OP_DETECT;
|
||||
platform->bridge.type = platform->pdata.panel_bridge ?
|
||||
DRM_MODE_CONNECTOR_eDP :
|
||||
DRM_MODE_CONNECTOR_DisplayPort;
|
||||
|
||||
drm_bridge_add(&platform->bridge);
|
||||
|
||||
if (!platform->pdata.is_dpi) {
|
||||
ret = anx7625_attach_dsi(platform);
|
||||
if (ret) {
|
||||
DRM_DEV_ERROR(dev, "Fail to attach to dsi : %d\n", ret);
|
||||
goto unregister_bridge;
|
||||
}
|
||||
}
|
||||
|
||||
if (platform->pdata.audio_en)
|
||||
anx7625_register_audio(dev, platform);
|
||||
|
||||
@ -2694,12 +2748,6 @@ static int anx7625_i2c_probe(struct i2c_client *client)
|
||||
|
||||
return 0;
|
||||
|
||||
unregister_bridge:
|
||||
drm_bridge_remove(&platform->bridge);
|
||||
|
||||
if (!platform->pdata.low_power_mode)
|
||||
pm_runtime_put_sync_suspend(&client->dev);
|
||||
|
||||
free_wq:
|
||||
if (platform->workqueue)
|
||||
destroy_workqueue(platform->workqueue);
|
||||
|
@ -183,6 +183,8 @@
|
||||
#define DSIM_AFC_CTL(x) (((x) & 0x7) << 5)
|
||||
|
||||
/* DSIM_PLLCTRL */
|
||||
#define DSIM_PLL_DPDNSWAP_CLK (1 << 25)
|
||||
#define DSIM_PLL_DPDNSWAP_DAT (1 << 24)
|
||||
#define DSIM_FREQ_BAND(x) ((x) << 24)
|
||||
#define DSIM_PLL_EN BIT(23)
|
||||
#define DSIM_PLL_P(x, offset) ((x) << (offset))
|
||||
@ -622,6 +624,11 @@ static unsigned long samsung_dsim_set_pll(struct samsung_dsim *dsi,
|
||||
reg |= DSIM_FREQ_BAND(band);
|
||||
}
|
||||
|
||||
if (dsi->swap_dn_dp_clk)
|
||||
reg |= DSIM_PLL_DPDNSWAP_CLK;
|
||||
if (dsi->swap_dn_dp_data)
|
||||
reg |= DSIM_PLL_DPDNSWAP_DAT;
|
||||
|
||||
samsung_dsim_write(dsi, DSIM_PLLCTRL_REG, reg);
|
||||
|
||||
timeout = 1000;
|
||||
@ -1696,7 +1703,9 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
|
||||
{
|
||||
struct device *dev = dsi->dev;
|
||||
struct device_node *node = dev->of_node;
|
||||
int ret;
|
||||
u32 lane_polarities[5] = { 0 };
|
||||
struct device_node *endpoint;
|
||||
int i, nr_lanes, ret;
|
||||
|
||||
ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
|
||||
&dsi->pll_clk_rate);
|
||||
@ -1713,6 +1722,22 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
endpoint = of_graph_get_endpoint_by_regs(node, 1, -1);
|
||||
nr_lanes = of_property_count_u32_elems(endpoint, "data-lanes");
|
||||
if (nr_lanes > 0 && nr_lanes <= 4) {
|
||||
/* Polarity 0 is clock lane, 1..4 are data lanes. */
|
||||
of_property_read_u32_array(endpoint, "lane-polarities",
|
||||
lane_polarities, nr_lanes + 1);
|
||||
for (i = 1; i <= nr_lanes; i++) {
|
||||
if (lane_polarities[1] != lane_polarities[i])
|
||||
DRM_DEV_ERROR(dsi->dev, "Data lanes polarities do not match");
|
||||
}
|
||||
if (lane_polarities[0])
|
||||
dsi->swap_dn_dp_clk = true;
|
||||
if (lane_polarities[1])
|
||||
dsi->swap_dn_dp_data = true;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1954,7 +1979,6 @@ static struct platform_driver samsung_dsim_driver = {
|
||||
.remove = samsung_dsim_remove,
|
||||
.driver = {
|
||||
.name = "samsung-dsim",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = &samsung_dsim_pm_ops,
|
||||
.of_match_table = samsung_dsim_of_match,
|
||||
},
|
||||
|
@ -533,7 +533,7 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
|
||||
adap->owner = THIS_MODULE;
|
||||
adap->dev.parent = hdmi->dev;
|
||||
adap->algo = &dw_hdmi_algorithm;
|
||||
strlcpy(adap->name, "DesignWare HDMI", sizeof(adap->name));
|
||||
strscpy(adap->name, "DesignWare HDMI", sizeof(adap->name));
|
||||
i2c_set_adapdata(adap, hdmi);
|
||||
|
||||
ret = i2c_add_adapter(adap);
|
||||
|
@ -1890,7 +1890,7 @@ static int tc_mipi_dsi_host_attach(struct tc_data *tc)
|
||||
if (dsi_lanes < 0)
|
||||
return dsi_lanes;
|
||||
|
||||
dsi = mipi_dsi_device_register_full(host, &info);
|
||||
dsi = devm_mipi_dsi_device_register_full(dev, host, &info);
|
||||
if (IS_ERR(dsi))
|
||||
return dev_err_probe(dev, PTR_ERR(dsi),
|
||||
"failed to create dsi device\n");
|
||||
@ -1901,7 +1901,7 @@ static int tc_mipi_dsi_host_attach(struct tc_data *tc)
|
||||
dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
||||
MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS;
|
||||
|
||||
ret = mipi_dsi_attach(dsi);
|
||||
ret = devm_mipi_dsi_attach(dev, dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to attach dsi to host: %d\n", ret);
|
||||
return ret;
|
||||
|
@ -952,7 +952,7 @@ tc358768_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
|
||||
case 24:
|
||||
input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
|
||||
break;
|
||||
};
|
||||
}
|
||||
|
||||
*num_input_fmts = MAX_INPUT_SEL_FORMATS;
|
||||
|
||||
|
@ -3154,7 +3154,7 @@ fail:
|
||||
EXPORT_SYMBOL(drm_atomic_helper_update_plane);
|
||||
|
||||
/**
|
||||
* drm_atomic_helper_disable_plane - Helper for primary plane disable using * atomic
|
||||
* drm_atomic_helper_disable_plane - Helper for primary plane disable using atomic
|
||||
* @plane: plane to disable
|
||||
* @ctx: lock acquire context
|
||||
*
|
||||
|
@ -231,7 +231,7 @@ static int psb_fbdev_fb_probe(struct drm_fb_helper *fb_helper,
|
||||
info->fix.mmio_start = pci_resource_start(pdev, 0);
|
||||
info->fix.mmio_len = pci_resource_len(pdev, 0);
|
||||
|
||||
memset(info->screen_base, 0, info->screen_size);
|
||||
fb_memset_io(info->screen_base, 0, info->screen_size);
|
||||
|
||||
/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
|
||||
|
||||
|
@ -121,9 +121,9 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
|
||||
|
||||
drm_fb_helper_fill_info(fbi, helper, sizes);
|
||||
|
||||
fbi->screen_base = msm_gem_get_vaddr(bo);
|
||||
if (IS_ERR(fbi->screen_base)) {
|
||||
ret = PTR_ERR(fbi->screen_base);
|
||||
fbi->screen_buffer = msm_gem_get_vaddr(bo);
|
||||
if (IS_ERR(fbi->screen_buffer)) {
|
||||
ret = PTR_ERR(fbi->screen_buffer);
|
||||
goto fail;
|
||||
}
|
||||
fbi->screen_size = bo->size;
|
||||
|
@ -64,6 +64,7 @@
|
||||
#include "nouveau_connector.h"
|
||||
#include "nouveau_encoder.h"
|
||||
#include "nouveau_fence.h"
|
||||
#include "nv50_display.h"
|
||||
|
||||
#include <subdev/bios/dp.h>
|
||||
|
||||
|
@ -211,7 +211,7 @@ static const struct attribute_group temp1_auto_point_sensor_group = {
|
||||
|
||||
#define N_ATTR_GROUPS 3
|
||||
|
||||
static const struct hwmon_channel_info *nouveau_info[] = {
|
||||
static const struct hwmon_channel_info * const nouveau_info[] = {
|
||||
HWMON_CHANNEL_INFO(chip,
|
||||
HWMON_C_UPDATE_INTERVAL),
|
||||
HWMON_CHANNEL_INFO(temp,
|
||||
|
@ -31,7 +31,5 @@
|
||||
#include "nouveau_reg.h"
|
||||
|
||||
int nv50_display_create(struct drm_device *);
|
||||
void nv50_display_destroy(struct drm_device *);
|
||||
int nv50_display_init(struct drm_device *);
|
||||
void nv50_display_fini(struct drm_device *);
|
||||
|
||||
#endif /* __NV50_DISPLAY_H__ */
|
||||
|
@ -45,7 +45,7 @@ ga102_gsp_nofw(struct nvkm_gsp *gsp, int ver, const struct nvkm_gsp_fwif *fwif)
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct nvkm_gsp_fwif
|
||||
static struct nvkm_gsp_fwif
|
||||
ga102_gsps[] = {
|
||||
{ -1, ga102_gsp_nofw, &ga102_gsp },
|
||||
{}
|
||||
|
@ -553,6 +553,13 @@ config DRM_PANEL_SAMSUNG_S6D27A1
|
||||
This panel can be found in Samsung Galaxy Ace 2
|
||||
GT-I8160 mobile phone.
|
||||
|
||||
config DRM_PANEL_SAMSUNG_S6D7AA0
|
||||
tristate "Samsung S6D7AA0 MIPI-DSI video mode panel controller"
|
||||
depends on OF
|
||||
depends on BACKLIGHT_CLASS_DEVICE
|
||||
select DRM_MIPI_DSI
|
||||
select VIDEOMODE_HELPERS
|
||||
|
||||
config DRM_PANEL_SAMSUNG_S6E3HA2
|
||||
tristate "Samsung S6E3HA2 DSI video mode panel"
|
||||
depends on OF
|
||||
|
@ -54,6 +54,7 @@ obj-$(CONFIG_DRM_PANEL_SAMSUNG_DB7430) += panel-samsung-db7430.o
|
||||
obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o
|
||||
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D16D0) += panel-samsung-s6d16d0.o
|
||||
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D27A1) += panel-samsung-s6d27a1.o
|
||||
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0) += panel-samsung-s6d7aa0.o
|
||||
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2) += panel-samsung-s6e3ha2.o
|
||||
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03) += panel-samsung-s6e63j0x03.o
|
||||
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0) += panel-samsung-s6e63m0.o
|
||||
|
@ -36,6 +36,7 @@ struct panel_desc {
|
||||
const struct panel_init_cmd *init_cmds;
|
||||
unsigned int lanes;
|
||||
bool discharge_on_disable;
|
||||
bool lp11_before_reset;
|
||||
};
|
||||
|
||||
struct boe_panel {
|
||||
@ -451,11 +452,14 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
|
||||
_INIT_DCS_CMD(0xFF, 0x20),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
_INIT_DCS_CMD(0x05, 0xD1),
|
||||
_INIT_DCS_CMD(0x0D, 0x63),
|
||||
_INIT_DCS_CMD(0x07, 0x8C),
|
||||
_INIT_DCS_CMD(0x06, 0xC0),
|
||||
_INIT_DCS_CMD(0x07, 0x87),
|
||||
_INIT_DCS_CMD(0x08, 0x4B),
|
||||
|
||||
_INIT_DCS_CMD(0x0D, 0x63),
|
||||
_INIT_DCS_CMD(0x0E, 0x91),
|
||||
_INIT_DCS_CMD(0x0F, 0x69),
|
||||
_INIT_DCS_CMD(0x94, 0x00),
|
||||
_INIT_DCS_CMD(0x95, 0xF5),
|
||||
_INIT_DCS_CMD(0x96, 0xF5),
|
||||
_INIT_DCS_CMD(0x9D, 0x00),
|
||||
@ -463,98 +467,96 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
|
||||
_INIT_DCS_CMD(0x69, 0x98),
|
||||
_INIT_DCS_CMD(0x75, 0xA2),
|
||||
_INIT_DCS_CMD(0x77, 0xB3),
|
||||
|
||||
_INIT_DCS_CMD(0x58, 0x43),
|
||||
_INIT_DCS_CMD(0xFF, 0x24),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
_INIT_DCS_CMD(0x91, 0x44),
|
||||
_INIT_DCS_CMD(0x92, 0x7A),
|
||||
_INIT_DCS_CMD(0x93, 0x1A),
|
||||
_INIT_DCS_CMD(0x94, 0x40),
|
||||
_INIT_DCS_CMD(0x9A, 0x08),
|
||||
_INIT_DCS_CMD(0x92, 0x4C),
|
||||
_INIT_DCS_CMD(0x94, 0x86),
|
||||
_INIT_DCS_CMD(0x60, 0x96),
|
||||
_INIT_DCS_CMD(0x61, 0xD0),
|
||||
_INIT_DCS_CMD(0x63, 0x70),
|
||||
_INIT_DCS_CMD(0xC2, 0xCF),
|
||||
_INIT_DCS_CMD(0x9B, 0x0F),
|
||||
_INIT_DCS_CMD(0x9A, 0x08),
|
||||
_INIT_DCS_CMD(0xC2, 0xCA),
|
||||
|
||||
_INIT_DCS_CMD(0x00, 0x03),
|
||||
_INIT_DCS_CMD(0x01, 0x03),
|
||||
_INIT_DCS_CMD(0x02, 0x03),
|
||||
_INIT_DCS_CMD(0x03, 0x03),
|
||||
_INIT_DCS_CMD(0x04, 0x03),
|
||||
_INIT_DCS_CMD(0x05, 0x03),
|
||||
_INIT_DCS_CMD(0x06, 0x22),
|
||||
_INIT_DCS_CMD(0x07, 0x06),
|
||||
_INIT_DCS_CMD(0x08, 0x00),
|
||||
_INIT_DCS_CMD(0x09, 0x1D),
|
||||
_INIT_DCS_CMD(0x0A, 0x1C),
|
||||
_INIT_DCS_CMD(0x0B, 0x13),
|
||||
_INIT_DCS_CMD(0x0C, 0x12),
|
||||
_INIT_DCS_CMD(0x0D, 0x11),
|
||||
_INIT_DCS_CMD(0x0E, 0x10),
|
||||
_INIT_DCS_CMD(0x0F, 0x0F),
|
||||
_INIT_DCS_CMD(0x10, 0x0E),
|
||||
_INIT_DCS_CMD(0x11, 0x0D),
|
||||
_INIT_DCS_CMD(0x12, 0x0C),
|
||||
_INIT_DCS_CMD(0x03, 0x29),
|
||||
_INIT_DCS_CMD(0x04, 0x22),
|
||||
_INIT_DCS_CMD(0x05, 0x22),
|
||||
_INIT_DCS_CMD(0x06, 0x0B),
|
||||
_INIT_DCS_CMD(0x07, 0x1D),
|
||||
_INIT_DCS_CMD(0x08, 0x1C),
|
||||
_INIT_DCS_CMD(0x09, 0x05),
|
||||
_INIT_DCS_CMD(0x0A, 0x08),
|
||||
_INIT_DCS_CMD(0x0B, 0x09),
|
||||
_INIT_DCS_CMD(0x0C, 0x0A),
|
||||
_INIT_DCS_CMD(0x0D, 0x0C),
|
||||
_INIT_DCS_CMD(0x0E, 0x0D),
|
||||
_INIT_DCS_CMD(0x0F, 0x0E),
|
||||
_INIT_DCS_CMD(0x10, 0x0F),
|
||||
_INIT_DCS_CMD(0x11, 0x10),
|
||||
_INIT_DCS_CMD(0x12, 0x11),
|
||||
_INIT_DCS_CMD(0x13, 0x04),
|
||||
_INIT_DCS_CMD(0x14, 0x03),
|
||||
_INIT_DCS_CMD(0x14, 0x00),
|
||||
_INIT_DCS_CMD(0x15, 0x03),
|
||||
_INIT_DCS_CMD(0x16, 0x03),
|
||||
_INIT_DCS_CMD(0x17, 0x03),
|
||||
_INIT_DCS_CMD(0x18, 0x03),
|
||||
_INIT_DCS_CMD(0x19, 0x03),
|
||||
_INIT_DCS_CMD(0x1A, 0x03),
|
||||
_INIT_DCS_CMD(0x1B, 0x03),
|
||||
_INIT_DCS_CMD(0x1C, 0x22),
|
||||
_INIT_DCS_CMD(0x1D, 0x06),
|
||||
_INIT_DCS_CMD(0x1E, 0x00),
|
||||
_INIT_DCS_CMD(0x1F, 0x1D),
|
||||
_INIT_DCS_CMD(0x20, 0x1C),
|
||||
_INIT_DCS_CMD(0x21, 0x13),
|
||||
_INIT_DCS_CMD(0x22, 0x12),
|
||||
_INIT_DCS_CMD(0x23, 0x11),
|
||||
_INIT_DCS_CMD(0x24, 0x10),
|
||||
_INIT_DCS_CMD(0x25, 0x0F),
|
||||
_INIT_DCS_CMD(0x26, 0x0E),
|
||||
_INIT_DCS_CMD(0x27, 0x0D),
|
||||
_INIT_DCS_CMD(0x28, 0x0C),
|
||||
_INIT_DCS_CMD(0x19, 0x29),
|
||||
_INIT_DCS_CMD(0x1A, 0x22),
|
||||
_INIT_DCS_CMD(0x1B, 0x22),
|
||||
_INIT_DCS_CMD(0x1C, 0x0B),
|
||||
_INIT_DCS_CMD(0x1D, 0x1D),
|
||||
_INIT_DCS_CMD(0x1E, 0x1C),
|
||||
_INIT_DCS_CMD(0x1F, 0x05),
|
||||
_INIT_DCS_CMD(0x20, 0x08),
|
||||
_INIT_DCS_CMD(0x21, 0x09),
|
||||
_INIT_DCS_CMD(0x22, 0x0A),
|
||||
_INIT_DCS_CMD(0x23, 0x0C),
|
||||
_INIT_DCS_CMD(0x24, 0x0D),
|
||||
_INIT_DCS_CMD(0x25, 0x0E),
|
||||
_INIT_DCS_CMD(0x26, 0x0F),
|
||||
_INIT_DCS_CMD(0x27, 0x10),
|
||||
_INIT_DCS_CMD(0x28, 0x11),
|
||||
_INIT_DCS_CMD(0x29, 0x04),
|
||||
_INIT_DCS_CMD(0x2A, 0x03),
|
||||
_INIT_DCS_CMD(0x2A, 0x00),
|
||||
_INIT_DCS_CMD(0x2B, 0x03),
|
||||
|
||||
_INIT_DCS_CMD(0x2F, 0x05),
|
||||
_INIT_DCS_CMD(0x30, 0x32),
|
||||
_INIT_DCS_CMD(0x31, 0x43),
|
||||
_INIT_DCS_CMD(0x33, 0x05),
|
||||
_INIT_DCS_CMD(0x34, 0x32),
|
||||
_INIT_DCS_CMD(0x35, 0x43),
|
||||
_INIT_DCS_CMD(0x37, 0x44),
|
||||
_INIT_DCS_CMD(0x38, 0x40),
|
||||
_INIT_DCS_CMD(0x2F, 0x0A),
|
||||
_INIT_DCS_CMD(0x30, 0x35),
|
||||
_INIT_DCS_CMD(0x37, 0xA7),
|
||||
_INIT_DCS_CMD(0x39, 0x00),
|
||||
_INIT_DCS_CMD(0x3A, 0x18),
|
||||
_INIT_DCS_CMD(0x3B, 0x00),
|
||||
_INIT_DCS_CMD(0x3D, 0x93),
|
||||
_INIT_DCS_CMD(0xAB, 0x44),
|
||||
_INIT_DCS_CMD(0xAC, 0x40),
|
||||
_INIT_DCS_CMD(0x3A, 0x46),
|
||||
_INIT_DCS_CMD(0x3B, 0x32),
|
||||
_INIT_DCS_CMD(0x3D, 0x12),
|
||||
|
||||
_INIT_DCS_CMD(0x3F, 0x33),
|
||||
_INIT_DCS_CMD(0x40, 0x31),
|
||||
_INIT_DCS_CMD(0x41, 0x40),
|
||||
_INIT_DCS_CMD(0x42, 0x42),
|
||||
_INIT_DCS_CMD(0x47, 0x77),
|
||||
_INIT_DCS_CMD(0x48, 0x77),
|
||||
_INIT_DCS_CMD(0x4A, 0x45),
|
||||
_INIT_DCS_CMD(0x4B, 0x45),
|
||||
_INIT_DCS_CMD(0x4C, 0x14),
|
||||
|
||||
_INIT_DCS_CMD(0x4D, 0x21),
|
||||
_INIT_DCS_CMD(0x4E, 0x43),
|
||||
_INIT_DCS_CMD(0x4F, 0x65),
|
||||
_INIT_DCS_CMD(0x50, 0x87),
|
||||
_INIT_DCS_CMD(0x51, 0x78),
|
||||
_INIT_DCS_CMD(0x52, 0x56),
|
||||
_INIT_DCS_CMD(0x53, 0x34),
|
||||
_INIT_DCS_CMD(0x54, 0x21),
|
||||
_INIT_DCS_CMD(0x55, 0x83),
|
||||
_INIT_DCS_CMD(0x56, 0x08),
|
||||
_INIT_DCS_CMD(0x55, 0x06),
|
||||
_INIT_DCS_CMD(0x56, 0x06),
|
||||
_INIT_DCS_CMD(0x58, 0x21),
|
||||
_INIT_DCS_CMD(0x59, 0x40),
|
||||
_INIT_DCS_CMD(0x5A, 0x00),
|
||||
_INIT_DCS_CMD(0x5B, 0x2C),
|
||||
_INIT_DCS_CMD(0x5E, 0x00, 0x10),
|
||||
_INIT_DCS_CMD(0x59, 0x70),
|
||||
_INIT_DCS_CMD(0x5A, 0x46),
|
||||
_INIT_DCS_CMD(0x5B, 0x32),
|
||||
_INIT_DCS_CMD(0x5C, 0x88),
|
||||
_INIT_DCS_CMD(0x5E, 0x00, 0x00),
|
||||
_INIT_DCS_CMD(0x5F, 0x00),
|
||||
|
||||
_INIT_DCS_CMD(0x7A, 0x00),
|
||||
_INIT_DCS_CMD(0x7B, 0x00),
|
||||
_INIT_DCS_CMD(0x7A, 0xFF),
|
||||
_INIT_DCS_CMD(0x7B, 0xFF),
|
||||
_INIT_DCS_CMD(0x7C, 0x00),
|
||||
_INIT_DCS_CMD(0x7D, 0x00),
|
||||
_INIT_DCS_CMD(0x7E, 0x20),
|
||||
@ -564,152 +566,183 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
|
||||
_INIT_DCS_CMD(0x82, 0x08),
|
||||
_INIT_DCS_CMD(0x97, 0x02),
|
||||
_INIT_DCS_CMD(0xC5, 0x10),
|
||||
|
||||
_INIT_DCS_CMD(0xD7, 0x55),
|
||||
_INIT_DCS_CMD(0xD8, 0x55),
|
||||
_INIT_DCS_CMD(0xD9, 0x23),
|
||||
_INIT_DCS_CMD(0xDA, 0x05),
|
||||
_INIT_DCS_CMD(0xDB, 0x01),
|
||||
_INIT_DCS_CMD(0xDC, 0x7A),
|
||||
_INIT_DCS_CMD(0xDC, 0x65),
|
||||
_INIT_DCS_CMD(0xDD, 0x55),
|
||||
_INIT_DCS_CMD(0xDE, 0x27),
|
||||
_INIT_DCS_CMD(0xDF, 0x01),
|
||||
_INIT_DCS_CMD(0xE0, 0x7A),
|
||||
_INIT_DCS_CMD(0xE0, 0x65),
|
||||
_INIT_DCS_CMD(0xE1, 0x01),
|
||||
_INIT_DCS_CMD(0xE2, 0x7A),
|
||||
_INIT_DCS_CMD(0xE2, 0x65),
|
||||
_INIT_DCS_CMD(0xE3, 0x01),
|
||||
_INIT_DCS_CMD(0xE4, 0x7A),
|
||||
_INIT_DCS_CMD(0xE4, 0x65),
|
||||
_INIT_DCS_CMD(0xE5, 0x01),
|
||||
_INIT_DCS_CMD(0xE6, 0x7A),
|
||||
_INIT_DCS_CMD(0xE6, 0x65),
|
||||
_INIT_DCS_CMD(0xE7, 0x00),
|
||||
_INIT_DCS_CMD(0xE8, 0x00),
|
||||
_INIT_DCS_CMD(0xE9, 0x01),
|
||||
_INIT_DCS_CMD(0xEA, 0x7A),
|
||||
_INIT_DCS_CMD(0xEA, 0x65),
|
||||
_INIT_DCS_CMD(0xEB, 0x01),
|
||||
_INIT_DCS_CMD(0xEE, 0x7A),
|
||||
_INIT_DCS_CMD(0xEE, 0x65),
|
||||
_INIT_DCS_CMD(0xEF, 0x01),
|
||||
_INIT_DCS_CMD(0xF0, 0x7A),
|
||||
|
||||
_INIT_DCS_CMD(0xF0, 0x65),
|
||||
_INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x25),
|
||||
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
|
||||
_INIT_DCS_CMD(0x05, 0x00),
|
||||
|
||||
_INIT_DCS_CMD(0x13, 0x02),
|
||||
_INIT_DCS_CMD(0x14, 0xDF),
|
||||
_INIT_DCS_CMD(0xF1, 0x10),
|
||||
|
||||
_INIT_DCS_CMD(0x1E, 0x00),
|
||||
_INIT_DCS_CMD(0x1F, 0x00),
|
||||
_INIT_DCS_CMD(0x20, 0x2C),
|
||||
_INIT_DCS_CMD(0x1F, 0x46),
|
||||
_INIT_DCS_CMD(0x20, 0x32),
|
||||
|
||||
_INIT_DCS_CMD(0x25, 0x00),
|
||||
_INIT_DCS_CMD(0x26, 0x00),
|
||||
_INIT_DCS_CMD(0x27, 0x2C),
|
||||
_INIT_DCS_CMD(0x26, 0x46),
|
||||
_INIT_DCS_CMD(0x27, 0x32),
|
||||
|
||||
_INIT_DCS_CMD(0x3F, 0x80),
|
||||
_INIT_DCS_CMD(0x40, 0x00),
|
||||
_INIT_DCS_CMD(0x43, 0x00),
|
||||
|
||||
_INIT_DCS_CMD(0x44, 0x18),
|
||||
_INIT_DCS_CMD(0x45, 0x00),
|
||||
_INIT_DCS_CMD(0x44, 0x46),
|
||||
_INIT_DCS_CMD(0x45, 0x46),
|
||||
|
||||
_INIT_DCS_CMD(0x48, 0x46),
|
||||
_INIT_DCS_CMD(0x49, 0x32),
|
||||
|
||||
_INIT_DCS_CMD(0x48, 0x00),
|
||||
_INIT_DCS_CMD(0x49, 0x2C),
|
||||
_INIT_DCS_CMD(0x5B, 0x80),
|
||||
|
||||
_INIT_DCS_CMD(0x5C, 0x00),
|
||||
_INIT_DCS_CMD(0x5D, 0x00),
|
||||
_INIT_DCS_CMD(0x5E, 0x00),
|
||||
_INIT_DCS_CMD(0x61, 0x00),
|
||||
_INIT_DCS_CMD(0x62, 0x2C),
|
||||
_INIT_DCS_CMD(0x68, 0x10),
|
||||
_INIT_DCS_CMD(0x5D, 0x46),
|
||||
_INIT_DCS_CMD(0x5E, 0x32),
|
||||
|
||||
_INIT_DCS_CMD(0x5F, 0x46),
|
||||
_INIT_DCS_CMD(0x60, 0x32),
|
||||
|
||||
_INIT_DCS_CMD(0x61, 0x46),
|
||||
_INIT_DCS_CMD(0x62, 0x32),
|
||||
_INIT_DCS_CMD(0x68, 0x0C),
|
||||
|
||||
_INIT_DCS_CMD(0x6C, 0x0D),
|
||||
_INIT_DCS_CMD(0x6E, 0x0D),
|
||||
_INIT_DCS_CMD(0x78, 0x00),
|
||||
_INIT_DCS_CMD(0x79, 0xC5),
|
||||
_INIT_DCS_CMD(0x7A, 0x0C),
|
||||
_INIT_DCS_CMD(0x7B, 0xB0),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x26),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
|
||||
_INIT_DCS_CMD(0x00, 0xA1),
|
||||
_INIT_DCS_CMD(0x02, 0x31),
|
||||
_INIT_DCS_CMD(0x0A, 0xF2),
|
||||
_INIT_DCS_CMD(0x04, 0x28),
|
||||
_INIT_DCS_CMD(0x0A, 0xF4),
|
||||
_INIT_DCS_CMD(0x04, 0x50),
|
||||
_INIT_DCS_CMD(0x06, 0x30),
|
||||
_INIT_DCS_CMD(0x0C, 0x16),
|
||||
_INIT_DCS_CMD(0x0D, 0x0D),
|
||||
_INIT_DCS_CMD(0x0F, 0x00),
|
||||
_INIT_DCS_CMD(0x11, 0x00),
|
||||
_INIT_DCS_CMD(0x12, 0x50),
|
||||
_INIT_DCS_CMD(0x13, 0x56),
|
||||
_INIT_DCS_CMD(0x14, 0x57),
|
||||
_INIT_DCS_CMD(0x13, 0x40),
|
||||
_INIT_DCS_CMD(0x14, 0x58),
|
||||
_INIT_DCS_CMD(0x15, 0x00),
|
||||
_INIT_DCS_CMD(0x16, 0x10),
|
||||
_INIT_DCS_CMD(0x17, 0xA0),
|
||||
_INIT_DCS_CMD(0x18, 0x86),
|
||||
_INIT_DCS_CMD(0x22, 0x00),
|
||||
_INIT_DCS_CMD(0x23, 0x00),
|
||||
_INIT_DCS_CMD(0x19, 0x0D),
|
||||
_INIT_DCS_CMD(0x1A, 0x7F),
|
||||
_INIT_DCS_CMD(0x1B, 0x0C),
|
||||
_INIT_DCS_CMD(0x1C, 0xBF),
|
||||
_INIT_DCS_CMD(0x2A, 0x0D),
|
||||
_INIT_DCS_CMD(0x2B, 0x7F),
|
||||
_INIT_DCS_CMD(0x20, 0x00),
|
||||
|
||||
_INIT_DCS_CMD(0x19, 0x0E),
|
||||
_INIT_DCS_CMD(0x1A, 0x31),
|
||||
_INIT_DCS_CMD(0x1B, 0x0D),
|
||||
_INIT_DCS_CMD(0x1C, 0x29),
|
||||
_INIT_DCS_CMD(0x2A, 0x0E),
|
||||
_INIT_DCS_CMD(0x2B, 0x31),
|
||||
|
||||
_INIT_DCS_CMD(0x1D, 0x00),
|
||||
_INIT_DCS_CMD(0x1E, 0x78),
|
||||
_INIT_DCS_CMD(0x1F, 0x78),
|
||||
_INIT_DCS_CMD(0x1E, 0x62),
|
||||
_INIT_DCS_CMD(0x1F, 0x62),
|
||||
|
||||
_INIT_DCS_CMD(0x2F, 0x03),
|
||||
_INIT_DCS_CMD(0x30, 0x78),
|
||||
_INIT_DCS_CMD(0x33, 0x78),
|
||||
_INIT_DCS_CMD(0x34, 0x66),
|
||||
_INIT_DCS_CMD(0x35, 0x11),
|
||||
_INIT_DCS_CMD(0x2F, 0x06),
|
||||
_INIT_DCS_CMD(0x30, 0x62),
|
||||
_INIT_DCS_CMD(0x31, 0x06),
|
||||
_INIT_DCS_CMD(0x32, 0x7F),
|
||||
_INIT_DCS_CMD(0x33, 0x11),
|
||||
_INIT_DCS_CMD(0x34, 0x89),
|
||||
_INIT_DCS_CMD(0x35, 0x67),
|
||||
|
||||
_INIT_DCS_CMD(0x39, 0x10),
|
||||
_INIT_DCS_CMD(0x3A, 0x78),
|
||||
_INIT_DCS_CMD(0x39, 0x0B),
|
||||
_INIT_DCS_CMD(0x3A, 0x62),
|
||||
_INIT_DCS_CMD(0x3B, 0x06),
|
||||
|
||||
_INIT_DCS_CMD(0xC8, 0x04),
|
||||
_INIT_DCS_CMD(0xC9, 0x84),
|
||||
_INIT_DCS_CMD(0xC9, 0x89),
|
||||
_INIT_DCS_CMD(0xCA, 0x4E),
|
||||
_INIT_DCS_CMD(0xCB, 0x00),
|
||||
_INIT_DCS_CMD(0xA9, 0x3F),
|
||||
_INIT_DCS_CMD(0xAA, 0x3E),
|
||||
_INIT_DCS_CMD(0xAB, 0x3D),
|
||||
_INIT_DCS_CMD(0xAC, 0x3C),
|
||||
_INIT_DCS_CMD(0xAD, 0x3B),
|
||||
_INIT_DCS_CMD(0xAE, 0x3A),
|
||||
_INIT_DCS_CMD(0xAF, 0x39),
|
||||
_INIT_DCS_CMD(0xB0, 0x38),
|
||||
|
||||
_INIT_DCS_CMD(0xA9, 0x50),
|
||||
_INIT_DCS_CMD(0xAA, 0x4F),
|
||||
_INIT_DCS_CMD(0xAB, 0x4D),
|
||||
_INIT_DCS_CMD(0xAC, 0x4A),
|
||||
_INIT_DCS_CMD(0xAD, 0x48),
|
||||
_INIT_DCS_CMD(0xAE, 0x46),
|
||||
_INIT_DCS_CMD(0xFF, 0x27),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
|
||||
_INIT_DCS_CMD(0xD0, 0x11),
|
||||
_INIT_DCS_CMD(0xD1, 0x54),
|
||||
_INIT_DCS_CMD(0xDE, 0x43),
|
||||
_INIT_DCS_CMD(0xDF, 0x02),
|
||||
|
||||
_INIT_DCS_CMD(0xC0, 0x18),
|
||||
_INIT_DCS_CMD(0xC1, 0x00),
|
||||
_INIT_DCS_CMD(0xC2, 0x00),
|
||||
_INIT_DCS_CMD(0x00, 0x00),
|
||||
_INIT_DCS_CMD(0xC3, 0x00),
|
||||
_INIT_DCS_CMD(0x56, 0x06),
|
||||
|
||||
_INIT_DCS_CMD(0x58, 0x80),
|
||||
_INIT_DCS_CMD(0x59, 0x75),
|
||||
_INIT_DCS_CMD(0x59, 0x78),
|
||||
_INIT_DCS_CMD(0x5A, 0x00),
|
||||
_INIT_DCS_CMD(0x5B, 0x02),
|
||||
_INIT_DCS_CMD(0x5B, 0x18),
|
||||
_INIT_DCS_CMD(0x5C, 0x00),
|
||||
_INIT_DCS_CMD(0x5D, 0x00),
|
||||
_INIT_DCS_CMD(0x5D, 0x01),
|
||||
_INIT_DCS_CMD(0x5E, 0x20),
|
||||
_INIT_DCS_CMD(0x5F, 0x10),
|
||||
_INIT_DCS_CMD(0x60, 0x00),
|
||||
_INIT_DCS_CMD(0x61, 0x2E),
|
||||
_INIT_DCS_CMD(0x61, 0x1C),
|
||||
_INIT_DCS_CMD(0x62, 0x00),
|
||||
_INIT_DCS_CMD(0x63, 0x01),
|
||||
_INIT_DCS_CMD(0x64, 0x43),
|
||||
_INIT_DCS_CMD(0x65, 0x2D),
|
||||
_INIT_DCS_CMD(0x64, 0x44),
|
||||
_INIT_DCS_CMD(0x65, 0x1B),
|
||||
_INIT_DCS_CMD(0x66, 0x00),
|
||||
_INIT_DCS_CMD(0x67, 0x01),
|
||||
_INIT_DCS_CMD(0x68, 0x43),
|
||||
_INIT_DCS_CMD(0x68, 0x44),
|
||||
|
||||
_INIT_DCS_CMD(0x98, 0x01),
|
||||
_INIT_DCS_CMD(0xB4, 0x03),
|
||||
_INIT_DCS_CMD(0x9B, 0xBD),
|
||||
_INIT_DCS_CMD(0xA0, 0x90),
|
||||
_INIT_DCS_CMD(0xAB, 0x1B),
|
||||
_INIT_DCS_CMD(0xBC, 0x0C),
|
||||
_INIT_DCS_CMD(0x9B, 0xBE),
|
||||
|
||||
_INIT_DCS_CMD(0xAB, 0x14),
|
||||
_INIT_DCS_CMD(0xBC, 0x08),
|
||||
_INIT_DCS_CMD(0xBD, 0x28),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x2A),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
|
||||
_INIT_DCS_CMD(0x22, 0x2F),
|
||||
_INIT_DCS_CMD(0x23, 0x08),
|
||||
|
||||
_INIT_DCS_CMD(0x24, 0x00),
|
||||
_INIT_DCS_CMD(0x25, 0x65),
|
||||
_INIT_DCS_CMD(0x25, 0x62),
|
||||
_INIT_DCS_CMD(0x26, 0xF8),
|
||||
_INIT_DCS_CMD(0x27, 0x00),
|
||||
_INIT_DCS_CMD(0x28, 0x1A),
|
||||
@ -719,18 +752,29 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
|
||||
_INIT_DCS_CMD(0x2D, 0x1A),
|
||||
|
||||
_INIT_DCS_CMD(0x64, 0x96),
|
||||
_INIT_DCS_CMD(0x65, 0x00),
|
||||
_INIT_DCS_CMD(0x65, 0x10),
|
||||
_INIT_DCS_CMD(0x66, 0x00),
|
||||
_INIT_DCS_CMD(0x67, 0x96),
|
||||
_INIT_DCS_CMD(0x68, 0x10),
|
||||
_INIT_DCS_CMD(0x69, 0x00),
|
||||
_INIT_DCS_CMD(0x6A, 0x96),
|
||||
_INIT_DCS_CMD(0x6B, 0x00),
|
||||
_INIT_DCS_CMD(0x6B, 0x10),
|
||||
_INIT_DCS_CMD(0x6C, 0x00),
|
||||
_INIT_DCS_CMD(0x70, 0x92),
|
||||
_INIT_DCS_CMD(0x71, 0x00),
|
||||
_INIT_DCS_CMD(0x71, 0x10),
|
||||
_INIT_DCS_CMD(0x72, 0x00),
|
||||
_INIT_DCS_CMD(0xA2, 0x33),
|
||||
_INIT_DCS_CMD(0x79, 0x96),
|
||||
_INIT_DCS_CMD(0x7A, 0x10),
|
||||
_INIT_DCS_CMD(0x88, 0x96),
|
||||
_INIT_DCS_CMD(0x89, 0x10),
|
||||
|
||||
_INIT_DCS_CMD(0xA2, 0x3F),
|
||||
_INIT_DCS_CMD(0xA3, 0x30),
|
||||
_INIT_DCS_CMD(0xA4, 0xC0),
|
||||
_INIT_DCS_CMD(0xA5, 0x03),
|
||||
|
||||
_INIT_DCS_CMD(0xE8, 0x00),
|
||||
|
||||
_INIT_DCS_CMD(0x97, 0x3C),
|
||||
_INIT_DCS_CMD(0x98, 0x02),
|
||||
_INIT_DCS_CMD(0x99, 0x95),
|
||||
@ -739,38 +783,68 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
|
||||
_INIT_DCS_CMD(0x9C, 0x0B),
|
||||
_INIT_DCS_CMD(0x9D, 0x0A),
|
||||
_INIT_DCS_CMD(0x9E, 0x90),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x25),
|
||||
_INIT_DCS_CMD(0x13, 0x02),
|
||||
_INIT_DCS_CMD(0x14, 0xD7),
|
||||
_INIT_DCS_CMD(0xDB, 0x02),
|
||||
_INIT_DCS_CMD(0xDC, 0xD7),
|
||||
_INIT_DCS_CMD(0x17, 0xCF),
|
||||
_INIT_DCS_CMD(0x19, 0x0F),
|
||||
_INIT_DCS_CMD(0x1B, 0x5B),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x20),
|
||||
|
||||
_INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x24, 0x00, 0x38, 0x00, 0x4C, 0x00, 0x5E, 0x00, 0x6F, 0x00, 0x7E),
|
||||
_INIT_DCS_CMD(0xB1, 0x00, 0x8C, 0x00, 0xBE, 0x00, 0xE5, 0x01, 0x27, 0x01, 0x58, 0x01, 0xA8, 0x01, 0xE8, 0x01, 0xEA),
|
||||
_INIT_DCS_CMD(0xB2, 0x02, 0x28, 0x02, 0x71, 0x02, 0x9E, 0x02, 0xDA, 0x03, 0x00, 0x03, 0x31, 0x03, 0x40, 0x03, 0x51),
|
||||
_INIT_DCS_CMD(0xB3, 0x03, 0x62, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9C, 0x03, 0xAA, 0x03, 0xB2),
|
||||
|
||||
_INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x27, 0x00, 0x3D, 0x00, 0x52, 0x00, 0x64, 0x00, 0x75, 0x00, 0x84),
|
||||
_INIT_DCS_CMD(0xB5, 0x00, 0x93, 0x00, 0xC5, 0x00, 0xEC, 0x01, 0x2C, 0x01, 0x5D, 0x01, 0xAC, 0x01, 0xEC, 0x01, 0xEE),
|
||||
_INIT_DCS_CMD(0xB6, 0x02, 0x2B, 0x02, 0x73, 0x02, 0xA0, 0x02, 0xDB, 0x03, 0x01, 0x03, 0x31, 0x03, 0x41, 0x03, 0x51),
|
||||
_INIT_DCS_CMD(0xB7, 0x03, 0x63, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9C, 0x03, 0xAA, 0x03, 0xB2),
|
||||
|
||||
_INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x2A, 0x00, 0x40, 0x00, 0x56, 0x00, 0x68, 0x00, 0x7A, 0x00, 0x89),
|
||||
_INIT_DCS_CMD(0xB9, 0x00, 0x98, 0x00, 0xC9, 0x00, 0xF1, 0x01, 0x30, 0x01, 0x61, 0x01, 0xB0, 0x01, 0xEF, 0x01, 0xF1),
|
||||
_INIT_DCS_CMD(0xBA, 0x02, 0x2E, 0x02, 0x76, 0x02, 0xA3, 0x02, 0xDD, 0x03, 0x02, 0x03, 0x32, 0x03, 0x42, 0x03, 0x53),
|
||||
_INIT_DCS_CMD(0xBB, 0x03, 0x66, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9C, 0x03, 0xAA, 0x03, 0xB2),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x21),
|
||||
_INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x24, 0x00, 0x38, 0x00, 0x4C, 0x00, 0x5E, 0x00, 0x6F, 0x00, 0x7E),
|
||||
_INIT_DCS_CMD(0xB1, 0x00, 0x8C, 0x00, 0xBE, 0x00, 0xE5, 0x01, 0x27, 0x01, 0x58, 0x01, 0xA8, 0x01, 0xE8, 0x01, 0xEA),
|
||||
_INIT_DCS_CMD(0xB2, 0x02, 0x28, 0x02, 0x71, 0x02, 0x9E, 0x02, 0xDA, 0x03, 0x00, 0x03, 0x31, 0x03, 0x40, 0x03, 0x51),
|
||||
_INIT_DCS_CMD(0xB3, 0x03, 0x62, 0x03, 0x77, 0x03, 0x90, 0x03, 0xAC, 0x03, 0xCA, 0x03, 0xDA),
|
||||
|
||||
_INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x27, 0x00, 0x3D, 0x00, 0x52, 0x00, 0x64, 0x00, 0x75, 0x00, 0x84),
|
||||
_INIT_DCS_CMD(0xB5, 0x00, 0x93, 0x00, 0xC5, 0x00, 0xEC, 0x01, 0x2C, 0x01, 0x5D, 0x01, 0xAC, 0x01, 0xEC, 0x01, 0xEE),
|
||||
_INIT_DCS_CMD(0xB6, 0x02, 0x2B, 0x02, 0x73, 0x02, 0xA0, 0x02, 0xDB, 0x03, 0x01, 0x03, 0x31, 0x03, 0x41, 0x03, 0x51),
|
||||
_INIT_DCS_CMD(0xB7, 0x03, 0x63, 0x03, 0x77, 0x03, 0x90, 0x03, 0xAC, 0x03, 0xCA, 0x03, 0xDA),
|
||||
|
||||
_INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x2A, 0x00, 0x40, 0x00, 0x56, 0x00, 0x68, 0x00, 0x7A, 0x00, 0x89),
|
||||
_INIT_DCS_CMD(0xB9, 0x00, 0x98, 0x00, 0xC9, 0x00, 0xF1, 0x01, 0x30, 0x01, 0x61, 0x01, 0xB0, 0x01, 0xEF, 0x01, 0xF1),
|
||||
_INIT_DCS_CMD(0xBA, 0x02, 0x2E, 0x02, 0x76, 0x02, 0xA3, 0x02, 0xDD, 0x03, 0x02, 0x03, 0x32, 0x03, 0x42, 0x03, 0x53),
|
||||
_INIT_DCS_CMD(0xBB, 0x03, 0x66, 0x03, 0x77, 0x03, 0x90, 0x03, 0xAC, 0x03, 0xCA, 0x03, 0xDA),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0xF0),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
_INIT_DCS_CMD(0x3A, 0x08),
|
||||
_INIT_DCS_CMD(0xFF, 0xD0),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
_INIT_DCS_CMD(0x00, 0x33),
|
||||
_INIT_DCS_CMD(0x08, 0x01),
|
||||
_INIT_DCS_CMD(0x09, 0xBF),
|
||||
_INIT_DCS_CMD(0x2F, 0x33),
|
||||
_INIT_DCS_CMD(0xFF, 0x23),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
_INIT_DCS_CMD(0x00, 0x80),
|
||||
_INIT_DCS_CMD(0x07, 0x00),
|
||||
_INIT_DCS_CMD(0xFF, 0x20),
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
_INIT_DCS_CMD(0x30, 0x00),
|
||||
_INIT_DCS_CMD(0xFF, 0x24),
|
||||
_INIT_DCS_CMD(0x5C, 0x88),
|
||||
_INIT_DCS_CMD(0x5D, 0x08),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x10),
|
||||
_INIT_DCS_CMD(0xB9, 0x01),
|
||||
|
||||
_INIT_DCS_CMD(0xFF, 0x20),
|
||||
|
||||
_INIT_DCS_CMD(0x18, 0x40),
|
||||
_INIT_DCS_CMD(0xFF, 0x10),
|
||||
|
||||
_INIT_DCS_CMD(0xB9, 0x02),
|
||||
_INIT_DCS_CMD(0xFF, 0x10),
|
||||
|
||||
_INIT_DCS_CMD(0xFB, 0x01),
|
||||
_INIT_DCS_CMD(0xBB, 0x13),
|
||||
_INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
|
||||
_INIT_DCS_CMD(0xB0, 0x01),
|
||||
_INIT_DCS_CMD(0x35, 0x00),
|
||||
_INIT_DCS_CMD(0x51, 0x0F, 0xFF),
|
||||
_INIT_DCS_CMD(0x53, 0x24),
|
||||
_INIT_DCS_CMD(0x3B, 0x03, 0xAE, 0x1A, 0x04, 0x04),
|
||||
_INIT_DELAY_CMD(100),
|
||||
_INIT_DCS_CMD(0x11),
|
||||
_INIT_DELAY_CMD(200),
|
||||
@ -780,7 +854,6 @@ static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
|
||||
};
|
||||
|
||||
static const struct panel_init_cmd boe_init_cmd[] = {
|
||||
_INIT_DELAY_CMD(24),
|
||||
_INIT_DCS_CMD(0xB0, 0x05),
|
||||
_INIT_DCS_CMD(0xB1, 0xE5),
|
||||
_INIT_DCS_CMD(0xB3, 0x52),
|
||||
@ -1366,6 +1439,10 @@ static int boe_panel_prepare(struct drm_panel *panel)
|
||||
|
||||
usleep_range(10000, 11000);
|
||||
|
||||
if (boe->desc->lp11_before_reset) {
|
||||
mipi_dsi_dcs_nop(boe->dsi);
|
||||
usleep_range(1000, 2000);
|
||||
}
|
||||
gpiod_set_value(boe->enable_gpio, 1);
|
||||
usleep_range(1000, 2000);
|
||||
gpiod_set_value(boe->enable_gpio, 0);
|
||||
@ -1431,15 +1508,15 @@ static const struct panel_desc boe_tv110c9m_desc = {
|
||||
};
|
||||
|
||||
static const struct drm_display_mode inx_hj110iz_default_mode = {
|
||||
.clock = 166594,
|
||||
.clock = 168432,
|
||||
.hdisplay = 1200,
|
||||
.hsync_start = 1200 + 40,
|
||||
.hsync_end = 1200 + 40 + 8,
|
||||
.htotal = 1200 + 40 + 8 + 28,
|
||||
.vdisplay = 2000,
|
||||
.vsync_start = 2000 + 26,
|
||||
.vsync_end = 2000 + 26 + 1,
|
||||
.vtotal = 2000 + 26 + 1 + 149,
|
||||
.vsync_end = 2000 + 26 + 2,
|
||||
.vtotal = 2000 + 26 + 2 + 172,
|
||||
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
|
||||
};
|
||||
|
||||
@ -1592,6 +1669,7 @@ static const struct panel_desc boe_tv105wum_nw0_desc = {
|
||||
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
|
||||
MIPI_DSI_MODE_LPM,
|
||||
.init_cmds = boe_init_cmd,
|
||||
.lp11_before_reset = true,
|
||||
};
|
||||
|
||||
static const struct drm_display_mode starry_qfh032011_53g_default_mode = {
|
||||
|
585
drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c
Normal file
585
drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c
Normal file
@ -0,0 +1,585 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Samsung S6D7AA0 MIPI-DSI TFT LCD controller drm_panel driver.
|
||||
*
|
||||
* Copyright (C) 2022 Artur Weber <aweber.kernel@gmail.com>
|
||||
*/
|
||||
|
||||
#include <linux/backlight.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_device.h>
|
||||
|
||||
#include <video/mipi_display.h>
|
||||
#include <drm/drm_mipi_dsi.h>
|
||||
#include <drm/drm_modes.h>
|
||||
#include <drm/drm_panel.h>
|
||||
|
||||
/* Manufacturer command set */
|
||||
#define MCS_BL_CTL 0xc3
|
||||
#define MCS_OTP_RELOAD 0xd0
|
||||
#define MCS_PASSWD1 0xf0
|
||||
#define MCS_PASSWD2 0xf1
|
||||
#define MCS_PASSWD3 0xfc
|
||||
|
||||
struct s6d7aa0 {
|
||||
struct drm_panel panel;
|
||||
struct mipi_dsi_device *dsi;
|
||||
struct gpio_desc *reset_gpio;
|
||||
struct regulator_bulk_data supplies[2];
|
||||
const struct s6d7aa0_panel_desc *desc;
|
||||
};
|
||||
|
||||
struct s6d7aa0_panel_desc {
|
||||
unsigned int panel_type;
|
||||
int (*init_func)(struct s6d7aa0 *ctx);
|
||||
int (*off_func)(struct s6d7aa0 *ctx);
|
||||
const struct drm_display_mode *drm_mode;
|
||||
unsigned long mode_flags;
|
||||
u32 bus_flags;
|
||||
bool has_backlight;
|
||||
bool use_passwd3;
|
||||
};
|
||||
|
||||
enum s6d7aa0_panels {
|
||||
S6D7AA0_PANEL_LSL080AL02,
|
||||
S6D7AA0_PANEL_LSL080AL03,
|
||||
S6D7AA0_PANEL_LTL101AT01,
|
||||
};
|
||||
|
||||
static inline struct s6d7aa0 *panel_to_s6d7aa0(struct drm_panel *panel)
|
||||
{
|
||||
return container_of(panel, struct s6d7aa0, panel);
|
||||
}
|
||||
|
||||
static void s6d7aa0_reset(struct s6d7aa0 *ctx)
|
||||
{
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
||||
msleep(50);
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
|
||||
msleep(50);
|
||||
}
|
||||
|
||||
static int s6d7aa0_lock(struct s6d7aa0 *ctx, bool lock)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = ctx->dsi;
|
||||
int ret = 0;
|
||||
|
||||
if (lock) {
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0xa5, 0xa5);
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0xa5, 0xa5);
|
||||
if (ctx->desc->use_passwd3)
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0x5a, 0x5a);
|
||||
} else {
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0x5a, 0x5a);
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0x5a, 0x5a);
|
||||
if (ctx->desc->use_passwd3)
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0xa5, 0xa5);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int s6d7aa0_on(struct s6d7aa0 *ctx)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = ctx->dsi;
|
||||
struct device *dev = &dsi->dev;
|
||||
int ret;
|
||||
|
||||
ret = ctx->desc->init_func(ctx);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to initialize panel: %d\n", ret);
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = mipi_dsi_dcs_set_display_on(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to set display on: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s6d7aa0_off(struct s6d7aa0 *ctx)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = ctx->dsi;
|
||||
struct device *dev = &dsi->dev;
|
||||
int ret;
|
||||
|
||||
ret = ctx->desc->off_func(ctx);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Panel-specific off function failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = mipi_dsi_dcs_set_display_off(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to set display off: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
msleep(64);
|
||||
|
||||
ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
msleep(120);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s6d7aa0_prepare(struct drm_panel *panel)
|
||||
{
|
||||
struct s6d7aa0 *ctx = panel_to_s6d7aa0(panel);
|
||||
struct device *dev = &ctx->dsi->dev;
|
||||
int ret;
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to enable regulators: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
s6d7aa0_reset(ctx);
|
||||
|
||||
ret = s6d7aa0_on(ctx);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to initialize panel: %d\n", ret);
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s6d7aa0_disable(struct drm_panel *panel)
|
||||
{
|
||||
struct s6d7aa0 *ctx = panel_to_s6d7aa0(panel);
|
||||
struct device *dev = &ctx->dsi->dev;
|
||||
int ret;
|
||||
|
||||
ret = s6d7aa0_off(ctx);
|
||||
if (ret < 0)
|
||||
dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s6d7aa0_unprepare(struct drm_panel *panel)
|
||||
{
|
||||
struct s6d7aa0 *ctx = panel_to_s6d7aa0(panel);
|
||||
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
||||
regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Backlight control code */
|
||||
|
||||
static int s6d7aa0_bl_update_status(struct backlight_device *bl)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = bl_get_data(bl);
|
||||
u16 brightness = backlight_get_brightness(bl);
|
||||
int ret;
|
||||
|
||||
ret = mipi_dsi_dcs_set_display_brightness(dsi, brightness);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s6d7aa0_bl_get_brightness(struct backlight_device *bl)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = bl_get_data(bl);
|
||||
u16 brightness;
|
||||
int ret;
|
||||
|
||||
ret = mipi_dsi_dcs_get_display_brightness(dsi, &brightness);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return brightness & 0xff;
|
||||
}
|
||||
|
||||
static const struct backlight_ops s6d7aa0_bl_ops = {
|
||||
.update_status = s6d7aa0_bl_update_status,
|
||||
.get_brightness = s6d7aa0_bl_get_brightness,
|
||||
};
|
||||
|
||||
static struct backlight_device *
|
||||
s6d7aa0_create_backlight(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
struct device *dev = &dsi->dev;
|
||||
const struct backlight_properties props = {
|
||||
.type = BACKLIGHT_RAW,
|
||||
.brightness = 255,
|
||||
.max_brightness = 255,
|
||||
};
|
||||
|
||||
return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
|
||||
&s6d7aa0_bl_ops, &props);
|
||||
}
|
||||
|
||||
/* Initialization code and structures for LSL080AL02 panel */
|
||||
|
||||
static int s6d7aa0_lsl080al02_init(struct s6d7aa0 *ctx)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = ctx->dsi;
|
||||
struct device *dev = &dsi->dev;
|
||||
int ret;
|
||||
|
||||
usleep_range(20000, 25000);
|
||||
|
||||
ret = s6d7aa0_lock(ctx, false);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to unlock registers: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_OTP_RELOAD, 0x00, 0x10);
|
||||
usleep_range(1000, 1500);
|
||||
|
||||
/* SEQ_B6_PARAM_8_R01 */
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x10);
|
||||
|
||||
/* BL_CTL_ON */
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0x40, 0x00, 0x28);
|
||||
|
||||
usleep_range(5000, 6000);
|
||||
|
||||
mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x04);
|
||||
|
||||
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
msleep(120);
|
||||
mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
|
||||
|
||||
ret = s6d7aa0_lock(ctx, true);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to lock registers: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = mipi_dsi_dcs_set_display_on(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to set display on: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s6d7aa0_lsl080al02_off(struct s6d7aa0 *ctx)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = ctx->dsi;
|
||||
|
||||
/* BL_CTL_OFF */
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0x40, 0x00, 0x20);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct drm_display_mode s6d7aa0_lsl080al02_mode = {
|
||||
.clock = (800 + 16 + 4 + 140) * (1280 + 8 + 4 + 4) * 60 / 1000,
|
||||
.hdisplay = 800,
|
||||
.hsync_start = 800 + 16,
|
||||
.hsync_end = 800 + 16 + 4,
|
||||
.htotal = 800 + 16 + 4 + 140,
|
||||
.vdisplay = 1280,
|
||||
.vsync_start = 1280 + 8,
|
||||
.vsync_end = 1280 + 8 + 4,
|
||||
.vtotal = 1280 + 8 + 4 + 4,
|
||||
.width_mm = 108,
|
||||
.height_mm = 173,
|
||||
};
|
||||
|
||||
static const struct s6d7aa0_panel_desc s6d7aa0_lsl080al02_desc = {
|
||||
.panel_type = S6D7AA0_PANEL_LSL080AL02,
|
||||
.init_func = s6d7aa0_lsl080al02_init,
|
||||
.off_func = s6d7aa0_lsl080al02_off,
|
||||
.drm_mode = &s6d7aa0_lsl080al02_mode,
|
||||
.mode_flags = MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_NO_HFP,
|
||||
.bus_flags = DRM_BUS_FLAG_DE_HIGH,
|
||||
|
||||
.has_backlight = false,
|
||||
.use_passwd3 = false,
|
||||
};
|
||||
|
||||
/* Initialization code and structures for LSL080AL03 panel */
|
||||
|
||||
static int s6d7aa0_lsl080al03_init(struct s6d7aa0 *ctx)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = ctx->dsi;
|
||||
struct device *dev = &dsi->dev;
|
||||
int ret;
|
||||
|
||||
usleep_range(20000, 25000);
|
||||
|
||||
ret = s6d7aa0_lock(ctx, false);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to unlock registers: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (ctx->desc->panel_type == S6D7AA0_PANEL_LSL080AL03) {
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0xc7, 0x00, 0x29);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x01, 0x4e, 0xa0);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xfd, 0x16, 0x10, 0x11, 0x23,
|
||||
0x09);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xfe, 0x00, 0x02, 0x03, 0x21,
|
||||
0x80, 0x78);
|
||||
} else if (ctx->desc->panel_type == S6D7AA0_PANEL_LTL101AT01) {
|
||||
mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0x40, 0x00, 0x08);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x01, 0x4e, 0x0b);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xfd, 0x16, 0x10, 0x11, 0x23,
|
||||
0x09);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xfe, 0x00, 0x02, 0x03, 0x21,
|
||||
0x80, 0x68);
|
||||
}
|
||||
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x51);
|
||||
mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xf2, 0x02, 0x08, 0x08);
|
||||
|
||||
usleep_range(10000, 11000);
|
||||
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x80, 0x80, 0x30);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xcd,
|
||||
0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e,
|
||||
0x2e, 0x2e, 0x2e, 0x2e, 0x2e);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xce,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00);
|
||||
mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x03);
|
||||
|
||||
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = s6d7aa0_lock(ctx, true);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to lock registers: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = mipi_dsi_dcs_set_display_on(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to set display on: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int s6d7aa0_lsl080al03_off(struct s6d7aa0 *ctx)
|
||||
{
|
||||
struct mipi_dsi_device *dsi = ctx->dsi;
|
||||
|
||||
mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct drm_display_mode s6d7aa0_lsl080al03_mode = {
|
||||
.clock = (768 + 18 + 16 + 126) * (1024 + 8 + 2 + 6) * 60 / 1000,
|
||||
.hdisplay = 768,
|
||||
.hsync_start = 768 + 18,
|
||||
.hsync_end = 768 + 18 + 16,
|
||||
.htotal = 768 + 18 + 16 + 126,
|
||||
.vdisplay = 1024,
|
||||
.vsync_start = 1024 + 8,
|
||||
.vsync_end = 1024 + 8 + 2,
|
||||
.vtotal = 1024 + 8 + 2 + 6,
|
||||
.width_mm = 122,
|
||||
.height_mm = 163,
|
||||
};
|
||||
|
||||
static const struct s6d7aa0_panel_desc s6d7aa0_lsl080al03_desc = {
|
||||
.panel_type = S6D7AA0_PANEL_LSL080AL03,
|
||||
.init_func = s6d7aa0_lsl080al03_init,
|
||||
.off_func = s6d7aa0_lsl080al03_off,
|
||||
.drm_mode = &s6d7aa0_lsl080al03_mode,
|
||||
.mode_flags = MIPI_DSI_MODE_NO_EOT_PACKET,
|
||||
.bus_flags = 0,
|
||||
|
||||
.has_backlight = true,
|
||||
.use_passwd3 = true,
|
||||
};
|
||||
|
||||
/* Initialization structures for LTL101AT01 panel */
|
||||
|
||||
static const struct drm_display_mode s6d7aa0_ltl101at01_mode = {
|
||||
.clock = (768 + 96 + 16 + 184) * (1024 + 8 + 2 + 6) * 60 / 1000,
|
||||
.hdisplay = 768,
|
||||
.hsync_start = 768 + 96,
|
||||
.hsync_end = 768 + 96 + 16,
|
||||
.htotal = 768 + 96 + 16 + 184,
|
||||
.vdisplay = 1024,
|
||||
.vsync_start = 1024 + 8,
|
||||
.vsync_end = 1024 + 8 + 2,
|
||||
.vtotal = 1024 + 8 + 2 + 6,
|
||||
.width_mm = 148,
|
||||
.height_mm = 197,
|
||||
};
|
||||
|
||||
static const struct s6d7aa0_panel_desc s6d7aa0_ltl101at01_desc = {
|
||||
.panel_type = S6D7AA0_PANEL_LTL101AT01,
|
||||
.init_func = s6d7aa0_lsl080al03_init, /* Similar init to LSL080AL03 */
|
||||
.off_func = s6d7aa0_lsl080al03_off,
|
||||
.drm_mode = &s6d7aa0_ltl101at01_mode,
|
||||
.mode_flags = MIPI_DSI_MODE_NO_EOT_PACKET,
|
||||
.bus_flags = 0,
|
||||
|
||||
.has_backlight = true,
|
||||
.use_passwd3 = true,
|
||||
};
|
||||
|
||||
static int s6d7aa0_get_modes(struct drm_panel *panel,
|
||||
struct drm_connector *connector)
|
||||
{
|
||||
struct drm_display_mode *mode;
|
||||
struct s6d7aa0 *ctx;
|
||||
|
||||
ctx = container_of(panel, struct s6d7aa0, panel);
|
||||
if (!ctx)
|
||||
return -EINVAL;
|
||||
|
||||
mode = drm_mode_duplicate(connector->dev, ctx->desc->drm_mode);
|
||||
if (!mode)
|
||||
return -ENOMEM;
|
||||
|
||||
drm_mode_set_name(mode);
|
||||
|
||||
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
||||
connector->display_info.width_mm = mode->width_mm;
|
||||
connector->display_info.height_mm = mode->height_mm;
|
||||
connector->display_info.bus_flags = ctx->desc->bus_flags;
|
||||
drm_mode_probed_add(connector, mode);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static const struct drm_panel_funcs s6d7aa0_panel_funcs = {
|
||||
.disable = s6d7aa0_disable,
|
||||
.prepare = s6d7aa0_prepare,
|
||||
.unprepare = s6d7aa0_unprepare,
|
||||
.get_modes = s6d7aa0_get_modes,
|
||||
};
|
||||
|
||||
static int s6d7aa0_probe(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
struct device *dev = &dsi->dev;
|
||||
struct s6d7aa0 *ctx;
|
||||
int ret;
|
||||
|
||||
ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
|
||||
if (!ctx)
|
||||
return -ENOMEM;
|
||||
|
||||
ctx->desc = of_device_get_match_data(dev);
|
||||
if (!ctx->desc)
|
||||
return -ENODEV;
|
||||
|
||||
ctx->supplies[0].supply = "power";
|
||||
ctx->supplies[1].supply = "vmipi";
|
||||
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
|
||||
ctx->supplies);
|
||||
if (ret < 0)
|
||||
return dev_err_probe(dev, ret, "Failed to get regulators\n");
|
||||
|
||||
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
||||
if (IS_ERR(ctx->reset_gpio))
|
||||
return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
|
||||
"Failed to get reset-gpios\n");
|
||||
|
||||
ctx->dsi = dsi;
|
||||
mipi_dsi_set_drvdata(dsi, ctx);
|
||||
|
||||
dsi->lanes = 4;
|
||||
dsi->format = MIPI_DSI_FMT_RGB888;
|
||||
dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST
|
||||
| ctx->desc->mode_flags;
|
||||
|
||||
drm_panel_init(&ctx->panel, dev, &s6d7aa0_panel_funcs,
|
||||
DRM_MODE_CONNECTOR_DSI);
|
||||
ctx->panel.prepare_prev_first = true;
|
||||
|
||||
ret = drm_panel_of_backlight(&ctx->panel);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "Failed to get backlight\n");
|
||||
|
||||
/* Use DSI-based backlight as fallback if available */
|
||||
if (ctx->desc->has_backlight && !ctx->panel.backlight) {
|
||||
ctx->panel.backlight = s6d7aa0_create_backlight(dsi);
|
||||
if (IS_ERR(ctx->panel.backlight))
|
||||
return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
|
||||
"Failed to create backlight\n");
|
||||
}
|
||||
|
||||
drm_panel_add(&ctx->panel);
|
||||
|
||||
ret = mipi_dsi_attach(dsi);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
|
||||
drm_panel_remove(&ctx->panel);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void s6d7aa0_remove(struct mipi_dsi_device *dsi)
|
||||
{
|
||||
struct s6d7aa0 *ctx = mipi_dsi_get_drvdata(dsi);
|
||||
int ret;
|
||||
|
||||
ret = mipi_dsi_detach(dsi);
|
||||
if (ret < 0)
|
||||
dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
|
||||
|
||||
drm_panel_remove(&ctx->panel);
|
||||
}
|
||||
|
||||
static const struct of_device_id s6d7aa0_of_match[] = {
|
||||
{
|
||||
.compatible = "samsung,lsl080al02",
|
||||
.data = &s6d7aa0_lsl080al02_desc
|
||||
},
|
||||
{
|
||||
.compatible = "samsung,lsl080al03",
|
||||
.data = &s6d7aa0_lsl080al03_desc
|
||||
},
|
||||
{
|
||||
.compatible = "samsung,ltl101at01",
|
||||
.data = &s6d7aa0_ltl101at01_desc
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static struct mipi_dsi_driver s6d7aa0_driver = {
|
||||
.probe = s6d7aa0_probe,
|
||||
.remove = s6d7aa0_remove,
|
||||
.driver = {
|
||||
.name = "panel-samsung-s6d7aa0",
|
||||
.of_match_table = s6d7aa0_of_match,
|
||||
},
|
||||
};
|
||||
module_mipi_dsi_driver(s6d7aa0_driver);
|
||||
|
||||
MODULE_AUTHOR("Artur Weber <aweber.kernel@gmail.com>");
|
||||
MODULE_DESCRIPTION("Samsung S6D7AA0 MIPI-DSI LCD controller driver");
|
||||
MODULE_LICENSE("GPL");
|
@ -28,9 +28,6 @@ struct sharp_nt_panel {
|
||||
struct gpio_desc *reset_gpio;
|
||||
|
||||
bool prepared;
|
||||
bool enabled;
|
||||
|
||||
const struct drm_display_mode *mode;
|
||||
};
|
||||
|
||||
static inline struct sharp_nt_panel *to_sharp_nt_panel(struct drm_panel *panel)
|
||||
@ -97,19 +94,6 @@ static int sharp_nt_panel_off(struct sharp_nt_panel *sharp_nt)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int sharp_nt_panel_disable(struct drm_panel *panel)
|
||||
{
|
||||
struct sharp_nt_panel *sharp_nt = to_sharp_nt_panel(panel);
|
||||
|
||||
if (!sharp_nt->enabled)
|
||||
return 0;
|
||||
|
||||
sharp_nt->enabled = false;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sharp_nt_panel_unprepare(struct drm_panel *panel)
|
||||
{
|
||||
struct sharp_nt_panel *sharp_nt = to_sharp_nt_panel(panel);
|
||||
@ -179,28 +163,16 @@ poweroff:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sharp_nt_panel_enable(struct drm_panel *panel)
|
||||
{
|
||||
struct sharp_nt_panel *sharp_nt = to_sharp_nt_panel(panel);
|
||||
|
||||
if (sharp_nt->enabled)
|
||||
return 0;
|
||||
|
||||
sharp_nt->enabled = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct drm_display_mode default_mode = {
|
||||
.clock = 41118,
|
||||
.clock = (540 + 48 + 32 + 80) * (960 + 3 + 10 + 15) * 60 / 1000,
|
||||
.hdisplay = 540,
|
||||
.hsync_start = 540 + 48,
|
||||
.hsync_end = 540 + 48 + 80,
|
||||
.htotal = 540 + 48 + 80 + 32,
|
||||
.hsync_end = 540 + 48 + 32,
|
||||
.htotal = 540 + 48 + 32 + 80,
|
||||
.vdisplay = 960,
|
||||
.vsync_start = 960 + 3,
|
||||
.vsync_end = 960 + 3 + 15,
|
||||
.vtotal = 960 + 3 + 15 + 1,
|
||||
.vsync_end = 960 + 3 + 10,
|
||||
.vtotal = 960 + 3 + 10 + 15,
|
||||
};
|
||||
|
||||
static int sharp_nt_panel_get_modes(struct drm_panel *panel,
|
||||
@ -227,10 +199,8 @@ static int sharp_nt_panel_get_modes(struct drm_panel *panel,
|
||||
}
|
||||
|
||||
static const struct drm_panel_funcs sharp_nt_panel_funcs = {
|
||||
.disable = sharp_nt_panel_disable,
|
||||
.unprepare = sharp_nt_panel_unprepare,
|
||||
.prepare = sharp_nt_panel_prepare,
|
||||
.enable = sharp_nt_panel_enable,
|
||||
.get_modes = sharp_nt_panel_get_modes,
|
||||
};
|
||||
|
||||
@ -239,8 +209,6 @@ static int sharp_nt_panel_add(struct sharp_nt_panel *sharp_nt)
|
||||
struct device *dev = &sharp_nt->dsi->dev;
|
||||
int ret;
|
||||
|
||||
sharp_nt->mode = &default_mode;
|
||||
|
||||
sharp_nt->supply = devm_regulator_get(dev, "avdd");
|
||||
if (IS_ERR(sharp_nt->supply))
|
||||
return PTR_ERR(sharp_nt->supply);
|
||||
@ -280,6 +248,7 @@ static int sharp_nt_panel_probe(struct mipi_dsi_device *dsi)
|
||||
dsi->lanes = 2;
|
||||
dsi->format = MIPI_DSI_FMT_RGB888;
|
||||
dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
|
||||
MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
|
||||
MIPI_DSI_MODE_VIDEO_HSE |
|
||||
MIPI_DSI_CLOCK_NON_CONTINUOUS |
|
||||
MIPI_DSI_MODE_NO_EOT_PACKET;
|
||||
|
@ -1211,6 +1211,37 @@ static const struct panel_desc bananapi_s070wv20_ct16 = {
|
||||
},
|
||||
};
|
||||
|
||||
static const struct display_timing boe_ev121wxm_n10_1850_timing = {
|
||||
.pixelclock = { 69922000, 71000000, 72293000 },
|
||||
.hactive = { 1280, 1280, 1280 },
|
||||
.hfront_porch = { 48, 48, 48 },
|
||||
.hback_porch = { 80, 80, 80 },
|
||||
.hsync_len = { 32, 32, 32 },
|
||||
.vactive = { 800, 800, 800 },
|
||||
.vfront_porch = { 3, 3, 3 },
|
||||
.vback_porch = { 14, 14, 14 },
|
||||
.vsync_len = { 6, 6, 6 },
|
||||
};
|
||||
|
||||
static const struct panel_desc boe_ev121wxm_n10_1850 = {
|
||||
.timings = &boe_ev121wxm_n10_1850_timing,
|
||||
.num_timings = 1,
|
||||
.bpc = 8,
|
||||
.size = {
|
||||
.width = 261,
|
||||
.height = 163,
|
||||
},
|
||||
.delay = {
|
||||
.prepare = 9,
|
||||
.enable = 300,
|
||||
.unprepare = 300,
|
||||
.disable = 560,
|
||||
},
|
||||
.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
|
||||
.bus_flags = DRM_BUS_FLAG_DE_HIGH,
|
||||
.connector_type = DRM_MODE_CONNECTOR_LVDS,
|
||||
};
|
||||
|
||||
static const struct drm_display_mode boe_hv070wsa_mode = {
|
||||
.clock = 42105,
|
||||
.hdisplay = 1024,
|
||||
@ -4016,6 +4047,9 @@ static const struct of_device_id platform_of_match[] = {
|
||||
}, {
|
||||
.compatible = "bananapi,s070wv20-ct16",
|
||||
.data = &bananapi_s070wv20_ct16,
|
||||
}, {
|
||||
.compatible = "boe,ev121wxm-n10-1850",
|
||||
.data = &boe_ev121wxm_n10_1850,
|
||||
}, {
|
||||
.compatible = "boe,hv070wsa-100",
|
||||
.data = &boe_hv070wsa
|
||||
|
@ -342,7 +342,7 @@ static void drm_sched_entity_wakeup(struct dma_fence *f,
|
||||
container_of(cb, struct drm_sched_entity, cb);
|
||||
|
||||
drm_sched_entity_clear_dep(f, cb);
|
||||
drm_sched_wakeup(entity->rq->sched);
|
||||
drm_sched_wakeup_if_can_queue(entity->rq->sched);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -565,7 +565,7 @@ void drm_sched_entity_push_job(struct drm_sched_job *sched_job)
|
||||
if (drm_sched_policy == DRM_SCHED_POLICY_FIFO)
|
||||
drm_sched_rq_update_fifo(entity, submit_ts);
|
||||
|
||||
drm_sched_wakeup(entity->rq->sched);
|
||||
drm_sched_wakeup_if_can_queue(entity->rq->sched);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(drm_sched_entity_push_job);
|
||||
|
@ -848,27 +848,26 @@ void drm_sched_job_cleanup(struct drm_sched_job *job)
|
||||
EXPORT_SYMBOL(drm_sched_job_cleanup);
|
||||
|
||||
/**
|
||||
* drm_sched_ready - is the scheduler ready
|
||||
*
|
||||
* drm_sched_can_queue -- Can we queue more to the hardware?
|
||||
* @sched: scheduler instance
|
||||
*
|
||||
* Return true if we can push more jobs to the hw, otherwise false.
|
||||
*/
|
||||
static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
|
||||
static bool drm_sched_can_queue(struct drm_gpu_scheduler *sched)
|
||||
{
|
||||
return atomic_read(&sched->hw_rq_count) <
|
||||
sched->hw_submission_limit;
|
||||
}
|
||||
|
||||
/**
|
||||
* drm_sched_wakeup - Wake up the scheduler when it is ready
|
||||
*
|
||||
* drm_sched_wakeup_if_can_queue - Wake up the scheduler
|
||||
* @sched: scheduler instance
|
||||
*
|
||||
* Wake up the scheduler if we can queue jobs.
|
||||
*/
|
||||
void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
|
||||
void drm_sched_wakeup_if_can_queue(struct drm_gpu_scheduler *sched)
|
||||
{
|
||||
if (drm_sched_ready(sched))
|
||||
if (drm_sched_can_queue(sched))
|
||||
wake_up_interruptible(&sched->wake_up_worker);
|
||||
}
|
||||
|
||||
@ -885,7 +884,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
|
||||
struct drm_sched_entity *entity;
|
||||
int i;
|
||||
|
||||
if (!drm_sched_ready(sched))
|
||||
if (!drm_sched_can_queue(sched))
|
||||
return NULL;
|
||||
|
||||
/* Kernel run queue has higher priority than normal run queue*/
|
||||
|
@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
config DRM_SHMOBILE
|
||||
tristate "DRM Support for SH Mobile"
|
||||
depends on DRM && ARM
|
||||
depends on ARCH_SHMOBILE || COMPILE_TEST
|
||||
depends on DRM
|
||||
depends on ARCH_RENESAS || ARCH_SHMOBILE || COMPILE_TEST
|
||||
select BACKLIGHT_CLASS_DEVICE
|
||||
select DRM_KMS_HELPER
|
||||
select DRM_GEM_DMA_HELPER
|
||||
|
@ -18,6 +18,7 @@
|
||||
#include <drm/drm_gem_dma_helper.h>
|
||||
#include <drm/drm_modeset_helper.h>
|
||||
#include <drm/drm_modeset_helper_vtables.h>
|
||||
#include <drm/drm_plane_helper.h>
|
||||
#include <drm/drm_probe_helper.h>
|
||||
#include <drm/drm_simple_kms_helper.h>
|
||||
#include <drm/drm_vblank.h>
|
||||
@ -232,6 +233,7 @@ static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
|
||||
value = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
|
||||
break;
|
||||
case DRM_FORMAT_ARGB8888:
|
||||
case DRM_FORMAT_XRGB8888:
|
||||
default:
|
||||
value = LDDDSR_LS;
|
||||
break;
|
||||
@ -355,8 +357,8 @@ static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
|
||||
|
||||
format = shmob_drm_format_info(crtc->primary->fb->format->format);
|
||||
if (format == NULL) {
|
||||
dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n",
|
||||
crtc->primary->fb->format->format);
|
||||
dev_dbg(sdev->dev, "mode_set: unsupported format %p4cc\n",
|
||||
&crtc->primary->fb->format->format);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -477,16 +479,41 @@ static const struct drm_crtc_funcs crtc_funcs = {
|
||||
.disable_vblank = shmob_drm_disable_vblank,
|
||||
};
|
||||
|
||||
static const uint32_t modeset_formats[] = {
|
||||
DRM_FORMAT_RGB565,
|
||||
DRM_FORMAT_RGB888,
|
||||
DRM_FORMAT_ARGB8888,
|
||||
DRM_FORMAT_XRGB8888,
|
||||
};
|
||||
|
||||
static const struct drm_plane_funcs primary_plane_funcs = {
|
||||
DRM_PLANE_NON_ATOMIC_FUNCS,
|
||||
};
|
||||
|
||||
int shmob_drm_crtc_create(struct shmob_drm_device *sdev)
|
||||
{
|
||||
struct drm_crtc *crtc = &sdev->crtc.crtc;
|
||||
struct drm_plane *primary;
|
||||
int ret;
|
||||
|
||||
sdev->crtc.dpms = DRM_MODE_DPMS_OFF;
|
||||
|
||||
ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs);
|
||||
if (ret < 0)
|
||||
primary = __drm_universal_plane_alloc(sdev->ddev, sizeof(*primary), 0,
|
||||
0, &primary_plane_funcs,
|
||||
modeset_formats,
|
||||
ARRAY_SIZE(modeset_formats),
|
||||
NULL, DRM_PLANE_TYPE_PRIMARY,
|
||||
NULL);
|
||||
if (IS_ERR(primary))
|
||||
return PTR_ERR(primary);
|
||||
|
||||
ret = drm_crtc_init_with_planes(sdev->ddev, crtc, primary, NULL,
|
||||
&crtc_funcs, NULL);
|
||||
if (ret < 0) {
|
||||
drm_plane_cleanup(primary);
|
||||
kfree(primary);
|
||||
return ret;
|
||||
}
|
||||
|
||||
drm_crtc_helper_add(crtc, &crtc_helper_funcs);
|
||||
|
||||
|
@ -16,6 +16,7 @@
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <drm/drm_drv.h>
|
||||
#include <drm/drm_fbdev_generic.h>
|
||||
#include <drm/drm_gem_dma_helper.h>
|
||||
#include <drm/drm_module.h>
|
||||
#include <drm/drm_probe_helper.h>
|
||||
@ -271,6 +272,8 @@ static int shmob_drm_probe(struct platform_device *pdev)
|
||||
if (ret < 0)
|
||||
goto err_irq_uninstall;
|
||||
|
||||
drm_fbdev_generic_setup(ddev, 16);
|
||||
|
||||
return 0;
|
||||
|
||||
err_irq_uninstall:
|
||||
|
@ -39,6 +39,11 @@ static const struct shmob_drm_format_info shmob_drm_format_infos[] = {
|
||||
.bpp = 32,
|
||||
.yuv = false,
|
||||
.lddfr = LDDFR_PKF_ARGB32,
|
||||
}, {
|
||||
.fourcc = DRM_FORMAT_XRGB8888,
|
||||
.bpp = 32,
|
||||
.yuv = false,
|
||||
.lddfr = LDDFR_PKF_ARGB32,
|
||||
}, {
|
||||
.fourcc = DRM_FORMAT_NV12,
|
||||
.bpp = 12,
|
||||
@ -96,8 +101,8 @@ shmob_drm_fb_create(struct drm_device *dev, struct drm_file *file_priv,
|
||||
|
||||
format = shmob_drm_format_info(mode_cmd->pixel_format);
|
||||
if (format == NULL) {
|
||||
dev_dbg(dev->dev, "unsupported pixel format %08x\n",
|
||||
mode_cmd->pixel_format);
|
||||
dev_dbg(dev->dev, "unsupported pixel format %p4cc\n",
|
||||
&mode_cmd->pixel_format);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
|
@ -80,6 +80,7 @@ static void __shmob_drm_plane_setup(struct shmob_drm_plane *splane,
|
||||
format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW | LDBBSIFR_SWPB;
|
||||
break;
|
||||
case DRM_FORMAT_ARGB8888:
|
||||
case DRM_FORMAT_XRGB8888:
|
||||
default:
|
||||
format |= LDBBSIFR_SWPL;
|
||||
break;
|
||||
@ -95,6 +96,9 @@ static void __shmob_drm_plane_setup(struct shmob_drm_plane *splane,
|
||||
case DRM_FORMAT_ARGB8888:
|
||||
format |= LDBBSIFR_AL_PK | LDBBSIFR_RY | LDDFR_PKF_ARGB32;
|
||||
break;
|
||||
case DRM_FORMAT_XRGB8888:
|
||||
format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDDFR_PKF_ARGB32;
|
||||
break;
|
||||
case DRM_FORMAT_NV12:
|
||||
case DRM_FORMAT_NV21:
|
||||
format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_420;
|
||||
@ -231,6 +235,7 @@ static const uint32_t formats[] = {
|
||||
DRM_FORMAT_RGB565,
|
||||
DRM_FORMAT_RGB888,
|
||||
DRM_FORMAT_ARGB8888,
|
||||
DRM_FORMAT_XRGB8888,
|
||||
DRM_FORMAT_NV12,
|
||||
DRM_FORMAT_NV21,
|
||||
DRM_FORMAT_NV16,
|
||||
|
@ -10,8 +10,8 @@
|
||||
* Copyright 2012 Free Electrons
|
||||
*/
|
||||
|
||||
#ifndef __SSD1307X_H__
|
||||
#define __SSD1307X_H__
|
||||
#ifndef __SSD130X_H__
|
||||
#define __SSD130X_H__
|
||||
|
||||
#include <drm/drm_connector.h>
|
||||
#include <drm/drm_crtc.h>
|
||||
@ -94,4 +94,4 @@ struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap);
|
||||
void ssd130x_remove(struct ssd130x_device *ssd130x);
|
||||
void ssd130x_shutdown(struct ssd130x_device *ssd130x);
|
||||
|
||||
#endif /* __SSD1307X_H__ */
|
||||
#endif /* __SSD130X_H__ */
|
||||
|
@ -784,21 +784,19 @@ static irqreturn_t sun4i_tcon_handler(int irq, void *private)
|
||||
static int sun4i_tcon_init_clocks(struct device *dev,
|
||||
struct sun4i_tcon *tcon)
|
||||
{
|
||||
tcon->clk = devm_clk_get(dev, "ahb");
|
||||
tcon->clk = devm_clk_get_enabled(dev, "ahb");
|
||||
if (IS_ERR(tcon->clk)) {
|
||||
dev_err(dev, "Couldn't get the TCON bus clock\n");
|
||||
return PTR_ERR(tcon->clk);
|
||||
}
|
||||
clk_prepare_enable(tcon->clk);
|
||||
|
||||
if (tcon->quirks->has_channel_0) {
|
||||
tcon->sclk0 = devm_clk_get(dev, "tcon-ch0");
|
||||
tcon->sclk0 = devm_clk_get_enabled(dev, "tcon-ch0");
|
||||
if (IS_ERR(tcon->sclk0)) {
|
||||
dev_err(dev, "Couldn't get the TCON channel 0 clock\n");
|
||||
return PTR_ERR(tcon->sclk0);
|
||||
}
|
||||
}
|
||||
clk_prepare_enable(tcon->sclk0);
|
||||
|
||||
if (tcon->quirks->has_channel_1) {
|
||||
tcon->sclk1 = devm_clk_get(dev, "tcon-ch1");
|
||||
@ -811,12 +809,6 @@ static int sun4i_tcon_init_clocks(struct device *dev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sun4i_tcon_free_clocks(struct sun4i_tcon *tcon)
|
||||
{
|
||||
clk_disable_unprepare(tcon->sclk0);
|
||||
clk_disable_unprepare(tcon->clk);
|
||||
}
|
||||
|
||||
static int sun4i_tcon_init_irq(struct device *dev,
|
||||
struct sun4i_tcon *tcon)
|
||||
{
|
||||
@ -1229,14 +1221,14 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
|
||||
ret = sun4i_tcon_init_regmap(dev, tcon);
|
||||
if (ret) {
|
||||
dev_err(dev, "Couldn't init our TCON regmap\n");
|
||||
goto err_free_clocks;
|
||||
goto err_assert_reset;
|
||||
}
|
||||
|
||||
if (tcon->quirks->has_channel_0) {
|
||||
ret = sun4i_dclk_create(dev, tcon);
|
||||
if (ret) {
|
||||
dev_err(dev, "Couldn't create our TCON dot clock\n");
|
||||
goto err_free_clocks;
|
||||
goto err_assert_reset;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1299,8 +1291,6 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
|
||||
err_free_dclk:
|
||||
if (tcon->quirks->has_channel_0)
|
||||
sun4i_dclk_free(tcon);
|
||||
err_free_clocks:
|
||||
sun4i_tcon_free_clocks(tcon);
|
||||
err_assert_reset:
|
||||
reset_control_assert(tcon->lcd_rst);
|
||||
return ret;
|
||||
@ -1314,7 +1304,6 @@ static void sun4i_tcon_unbind(struct device *dev, struct device *master,
|
||||
list_del(&tcon->list);
|
||||
if (tcon->quirks->has_channel_0)
|
||||
sun4i_dclk_free(tcon);
|
||||
sun4i_tcon_free_clocks(tcon);
|
||||
}
|
||||
|
||||
static const struct component_ops sun4i_tcon_ops = {
|
||||
|
@ -189,7 +189,7 @@ EXPORT_SYMBOL(ttm_device_swapout);
|
||||
* Returns:
|
||||
* !0: Failure.
|
||||
*/
|
||||
int ttm_device_init(struct ttm_device *bdev, struct ttm_device_funcs *funcs,
|
||||
int ttm_device_init(struct ttm_device *bdev, const struct ttm_device_funcs *funcs,
|
||||
struct device *dev, struct address_space *mapping,
|
||||
struct drm_vma_offset_manager *vma_manager,
|
||||
bool use_dma_alloc, bool use_dma32)
|
||||
|
@ -106,9 +106,9 @@ static void RGB565_to_argb_u16(u8 *src_pixels, struct pixel_argb_u16 *out_pixel)
|
||||
s64 fp_b = drm_int2fixp(rgb_565 & 0x1f);
|
||||
|
||||
out_pixel->a = (u16)0xffff;
|
||||
out_pixel->r = drm_fixp2int(drm_fixp_mul(fp_r, fp_rb_ratio));
|
||||
out_pixel->g = drm_fixp2int(drm_fixp_mul(fp_g, fp_g_ratio));
|
||||
out_pixel->b = drm_fixp2int(drm_fixp_mul(fp_b, fp_rb_ratio));
|
||||
out_pixel->r = drm_fixp2int_round(drm_fixp_mul(fp_r, fp_rb_ratio));
|
||||
out_pixel->g = drm_fixp2int_round(drm_fixp_mul(fp_g, fp_g_ratio));
|
||||
out_pixel->b = drm_fixp2int_round(drm_fixp_mul(fp_b, fp_rb_ratio));
|
||||
}
|
||||
|
||||
void vkms_compose_row(struct line_buffer *stage_buffer, struct vkms_plane_state *plane, int y)
|
||||
@ -232,9 +232,9 @@ static void argb_u16_to_RGB565(struct vkms_frame_info *frame_info,
|
||||
s64 fp_g = drm_int2fixp(in_pixels[x].g);
|
||||
s64 fp_b = drm_int2fixp(in_pixels[x].b);
|
||||
|
||||
u16 r = drm_fixp2int(drm_fixp_div(fp_r, fp_rb_ratio));
|
||||
u16 g = drm_fixp2int(drm_fixp_div(fp_g, fp_g_ratio));
|
||||
u16 b = drm_fixp2int(drm_fixp_div(fp_b, fp_rb_ratio));
|
||||
u16 r = drm_fixp2int_round(drm_fixp_div(fp_r, fp_rb_ratio));
|
||||
u16 g = drm_fixp2int_round(drm_fixp_div(fp_g, fp_g_ratio));
|
||||
u16 b = drm_fixp2int_round(drm_fixp_div(fp_b, fp_rb_ratio));
|
||||
|
||||
*dst_pixels = cpu_to_le16(r << 11 | g << 5 | b);
|
||||
}
|
||||
|
@ -8,6 +8,7 @@
|
||||
|
||||
struct ipu_soc;
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/clk.h>
|
||||
|
@ -16,7 +16,7 @@
|
||||
#include <linux/pagemap.h>
|
||||
#include <linux/screen_info.h>
|
||||
#include <linux/console.h>
|
||||
#include <asm/fb.h>
|
||||
|
||||
#include "sm750.h"
|
||||
#include "sm750_accel.h"
|
||||
#include "sm750_cursor.h"
|
||||
|
@ -41,6 +41,7 @@
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/arcfb.h>
|
||||
|
@ -3,8 +3,10 @@
|
||||
* ATI Frame Buffer Device Driver Core Definitions
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/wait.h>
|
||||
|
||||
/*
|
||||
* Elements of the hardware specific atyfb_par structure
|
||||
*/
|
||||
|
@ -153,7 +153,7 @@ static int atyfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
|
||||
u8 m, b;
|
||||
|
||||
// Clear cursor image with 1010101010...
|
||||
fb_memset(dst, 0xaa, 1024);
|
||||
fb_memset_io(dst, 0xaa, 1024);
|
||||
|
||||
offset = align - width*2;
|
||||
|
||||
|
@ -332,7 +332,7 @@ static const struct fb_var_screeninfo chipsfb_var = {
|
||||
|
||||
static void init_chips(struct fb_info *p, unsigned long addr)
|
||||
{
|
||||
fb_memset(p->screen_base, 0, 0x100000);
|
||||
fb_memset_io(p->screen_base, 0, 0x100000);
|
||||
|
||||
p->fix = chipsfb_fix;
|
||||
p->fix.smem_start = addr;
|
||||
|
@ -42,7 +42,7 @@ ssize_t fb_io_read(struct fb_info *info, char __user *buf, size_t count, loff_t
|
||||
while (count) {
|
||||
c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
|
||||
dst = buffer;
|
||||
fb_memcpy_fromfb(dst, src, c);
|
||||
fb_memcpy_fromio(dst, src, c);
|
||||
dst += c;
|
||||
src += c;
|
||||
|
||||
@ -117,7 +117,7 @@ ssize_t fb_io_write(struct fb_info *info, const char __user *buf, size_t count,
|
||||
}
|
||||
c -= trailing;
|
||||
|
||||
fb_memcpy_tofb(dst, src, c);
|
||||
fb_memcpy_toio(dst, src, c);
|
||||
dst += c;
|
||||
src += c;
|
||||
*ppos += c;
|
||||
|
@ -75,7 +75,6 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/crc32.h> /* For counting font checksums */
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/fb.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include "fbcon.h"
|
||||
|
@ -37,8 +37,6 @@
|
||||
#include <linux/mem_encrypt.h>
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <asm/fb.h>
|
||||
|
||||
#include <video/nomodeset.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
|
@ -42,17 +42,33 @@ static struct fb_fix_screeninfo hitfb_fix = {
|
||||
.accel = FB_ACCEL_NONE,
|
||||
};
|
||||
|
||||
static volatile void __iomem *hitfb_offset_to_addr(unsigned int offset)
|
||||
{
|
||||
return (__force volatile void __iomem *)(uintptr_t)offset;
|
||||
}
|
||||
|
||||
static u16 hitfb_readw(unsigned int offset)
|
||||
{
|
||||
return fb_readw(hitfb_offset_to_addr(offset));
|
||||
}
|
||||
|
||||
static void hitfb_writew(u16 value, unsigned int offset)
|
||||
{
|
||||
fb_writew(value, hitfb_offset_to_addr(offset));
|
||||
}
|
||||
|
||||
static inline void hitfb_accel_wait(void)
|
||||
{
|
||||
while (fb_readw(HD64461_GRCFGR) & HD64461_GRCFGR_ACCSTATUS) ;
|
||||
while (hitfb_readw(HD64461_GRCFGR) & HD64461_GRCFGR_ACCSTATUS)
|
||||
;
|
||||
}
|
||||
|
||||
static inline void hitfb_accel_start(int truecolor)
|
||||
{
|
||||
if (truecolor) {
|
||||
fb_writew(6, HD64461_GRCFGR);
|
||||
hitfb_writew(6, HD64461_GRCFGR);
|
||||
} else {
|
||||
fb_writew(7, HD64461_GRCFGR);
|
||||
hitfb_writew(7, HD64461_GRCFGR);
|
||||
}
|
||||
}
|
||||
|
||||
@ -63,11 +79,11 @@ static inline void hitfb_accel_set_dest(int truecolor, u16 dx, u16 dy,
|
||||
if (truecolor)
|
||||
saddr <<= 1;
|
||||
|
||||
fb_writew(width-1, HD64461_BBTDWR);
|
||||
fb_writew(height-1, HD64461_BBTDHR);
|
||||
hitfb_writew(width-1, HD64461_BBTDWR);
|
||||
hitfb_writew(height-1, HD64461_BBTDHR);
|
||||
|
||||
fb_writew(saddr & 0xffff, HD64461_BBTDSARL);
|
||||
fb_writew(saddr >> 16, HD64461_BBTDSARH);
|
||||
hitfb_writew(saddr & 0xffff, HD64461_BBTDSARL);
|
||||
hitfb_writew(saddr >> 16, HD64461_BBTDSARH);
|
||||
|
||||
}
|
||||
|
||||
@ -80,7 +96,7 @@ static inline void hitfb_accel_bitblt(int truecolor, u16 sx, u16 sy, u16 dx,
|
||||
|
||||
height--;
|
||||
width--;
|
||||
fb_writew(rop, HD64461_BBTROPR);
|
||||
hitfb_writew(rop, HD64461_BBTROPR);
|
||||
if ((sy < dy) || ((sy == dy) && (sx <= dx))) {
|
||||
saddr = WIDTH * (sy + height) + sx + width;
|
||||
daddr = WIDTH * (dy + height) + dx + width;
|
||||
@ -91,32 +107,32 @@ static inline void hitfb_accel_bitblt(int truecolor, u16 sx, u16 sy, u16 dx,
|
||||
maddr =
|
||||
(((width >> 4) + 1) * (height + 1) - 1) * 2;
|
||||
|
||||
fb_writew((1 << 5) | 1, HD64461_BBTMDR);
|
||||
hitfb_writew((1 << 5) | 1, HD64461_BBTMDR);
|
||||
} else
|
||||
fb_writew(1, HD64461_BBTMDR);
|
||||
hitfb_writew(1, HD64461_BBTMDR);
|
||||
} else {
|
||||
saddr = WIDTH * sy + sx;
|
||||
daddr = WIDTH * dy + dx;
|
||||
if (mask_addr) {
|
||||
fb_writew((1 << 5), HD64461_BBTMDR);
|
||||
hitfb_writew((1 << 5), HD64461_BBTMDR);
|
||||
} else {
|
||||
fb_writew(0, HD64461_BBTMDR);
|
||||
hitfb_writew(0, HD64461_BBTMDR);
|
||||
}
|
||||
}
|
||||
if (truecolor) {
|
||||
saddr <<= 1;
|
||||
daddr <<= 1;
|
||||
}
|
||||
fb_writew(width, HD64461_BBTDWR);
|
||||
fb_writew(height, HD64461_BBTDHR);
|
||||
fb_writew(saddr & 0xffff, HD64461_BBTSSARL);
|
||||
fb_writew(saddr >> 16, HD64461_BBTSSARH);
|
||||
fb_writew(daddr & 0xffff, HD64461_BBTDSARL);
|
||||
fb_writew(daddr >> 16, HD64461_BBTDSARH);
|
||||
hitfb_writew(width, HD64461_BBTDWR);
|
||||
hitfb_writew(height, HD64461_BBTDHR);
|
||||
hitfb_writew(saddr & 0xffff, HD64461_BBTSSARL);
|
||||
hitfb_writew(saddr >> 16, HD64461_BBTSSARH);
|
||||
hitfb_writew(daddr & 0xffff, HD64461_BBTDSARL);
|
||||
hitfb_writew(daddr >> 16, HD64461_BBTDSARH);
|
||||
if (mask_addr) {
|
||||
maddr += mask_addr;
|
||||
fb_writew(maddr & 0xffff, HD64461_BBTMARL);
|
||||
fb_writew(maddr >> 16, HD64461_BBTMARH);
|
||||
hitfb_writew(maddr & 0xffff, HD64461_BBTMARL);
|
||||
hitfb_writew(maddr >> 16, HD64461_BBTMARH);
|
||||
}
|
||||
hitfb_accel_start(truecolor);
|
||||
}
|
||||
@ -127,17 +143,17 @@ static void hitfb_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
|
||||
cfb_fillrect(p, rect);
|
||||
else {
|
||||
hitfb_accel_wait();
|
||||
fb_writew(0x00f0, HD64461_BBTROPR);
|
||||
fb_writew(16, HD64461_BBTMDR);
|
||||
hitfb_writew(0x00f0, HD64461_BBTROPR);
|
||||
hitfb_writew(16, HD64461_BBTMDR);
|
||||
|
||||
if (p->var.bits_per_pixel == 16) {
|
||||
fb_writew(((u32 *) (p->pseudo_palette))[rect->color],
|
||||
hitfb_writew(((u32 *) (p->pseudo_palette))[rect->color],
|
||||
HD64461_GRSCR);
|
||||
hitfb_accel_set_dest(1, rect->dx, rect->dy, rect->width,
|
||||
rect->height);
|
||||
hitfb_accel_start(1);
|
||||
} else {
|
||||
fb_writew(rect->color, HD64461_GRSCR);
|
||||
hitfb_writew(rect->color, HD64461_GRSCR);
|
||||
hitfb_accel_set_dest(0, rect->dx, rect->dy, rect->width,
|
||||
rect->height);
|
||||
hitfb_accel_start(0);
|
||||
@ -162,7 +178,7 @@ static int hitfb_pan_display(struct fb_var_screeninfo *var,
|
||||
if (xoffset != 0)
|
||||
return -EINVAL;
|
||||
|
||||
fb_writew((yoffset*info->fix.line_length)>>10, HD64461_LCDCBAR);
|
||||
hitfb_writew((yoffset*info->fix.line_length)>>10, HD64461_LCDCBAR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -172,33 +188,33 @@ int hitfb_blank(int blank_mode, struct fb_info *info)
|
||||
unsigned short v;
|
||||
|
||||
if (blank_mode) {
|
||||
v = fb_readw(HD64461_LDR1);
|
||||
v = hitfb_readw(HD64461_LDR1);
|
||||
v &= ~HD64461_LDR1_DON;
|
||||
fb_writew(v, HD64461_LDR1);
|
||||
hitfb_writew(v, HD64461_LDR1);
|
||||
|
||||
v = fb_readw(HD64461_LCDCCR);
|
||||
v = hitfb_readw(HD64461_LCDCCR);
|
||||
v |= HD64461_LCDCCR_MOFF;
|
||||
fb_writew(v, HD64461_LCDCCR);
|
||||
hitfb_writew(v, HD64461_LCDCCR);
|
||||
|
||||
v = fb_readw(HD64461_STBCR);
|
||||
v = hitfb_readw(HD64461_STBCR);
|
||||
v |= HD64461_STBCR_SLCDST;
|
||||
fb_writew(v, HD64461_STBCR);
|
||||
hitfb_writew(v, HD64461_STBCR);
|
||||
} else {
|
||||
v = fb_readw(HD64461_STBCR);
|
||||
v = hitfb_readw(HD64461_STBCR);
|
||||
v &= ~HD64461_STBCR_SLCDST;
|
||||
fb_writew(v, HD64461_STBCR);
|
||||
hitfb_writew(v, HD64461_STBCR);
|
||||
|
||||
v = fb_readw(HD64461_LCDCCR);
|
||||
v = hitfb_readw(HD64461_LCDCCR);
|
||||
v &= ~(HD64461_LCDCCR_MOFF | HD64461_LCDCCR_STREQ);
|
||||
fb_writew(v, HD64461_LCDCCR);
|
||||
hitfb_writew(v, HD64461_LCDCCR);
|
||||
|
||||
do {
|
||||
v = fb_readw(HD64461_LCDCCR);
|
||||
v = hitfb_readw(HD64461_LCDCCR);
|
||||
} while(v&HD64461_LCDCCR_STBACK);
|
||||
|
||||
v = fb_readw(HD64461_LDR1);
|
||||
v = hitfb_readw(HD64461_LDR1);
|
||||
v |= HD64461_LDR1_DON;
|
||||
fb_writew(v, HD64461_LDR1);
|
||||
hitfb_writew(v, HD64461_LDR1);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@ -211,10 +227,10 @@ static int hitfb_setcolreg(unsigned regno, unsigned red, unsigned green,
|
||||
|
||||
switch (info->var.bits_per_pixel) {
|
||||
case 8:
|
||||
fb_writew(regno << 8, HD64461_CPTWAR);
|
||||
fb_writew(red >> 10, HD64461_CPTWDR);
|
||||
fb_writew(green >> 10, HD64461_CPTWDR);
|
||||
fb_writew(blue >> 10, HD64461_CPTWDR);
|
||||
hitfb_writew(regno << 8, HD64461_CPTWAR);
|
||||
hitfb_writew(red >> 10, HD64461_CPTWDR);
|
||||
hitfb_writew(green >> 10, HD64461_CPTWDR);
|
||||
hitfb_writew(blue >> 10, HD64461_CPTWDR);
|
||||
break;
|
||||
case 16:
|
||||
if (regno >= 16)
|
||||
@ -302,11 +318,11 @@ static int hitfb_set_par(struct fb_info *info)
|
||||
break;
|
||||
}
|
||||
|
||||
fb_writew(info->fix.line_length, HD64461_LCDCLOR);
|
||||
ldr3 = fb_readw(HD64461_LDR3);
|
||||
hitfb_writew(info->fix.line_length, HD64461_LCDCLOR);
|
||||
ldr3 = hitfb_readw(HD64461_LDR3);
|
||||
ldr3 &= ~15;
|
||||
ldr3 |= (info->var.bits_per_pixel == 8) ? 4 : 8;
|
||||
fb_writew(ldr3, HD64461_LDR3);
|
||||
hitfb_writew(ldr3, HD64461_LDR3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -337,9 +353,9 @@ static int hitfb_probe(struct platform_device *dev)
|
||||
hitfb_fix.smem_start = HD64461_IO_OFFSET(0x02000000);
|
||||
hitfb_fix.smem_len = 512 * 1024;
|
||||
|
||||
lcdclor = fb_readw(HD64461_LCDCLOR);
|
||||
ldvndr = fb_readw(HD64461_LDVNDR);
|
||||
ldr3 = fb_readw(HD64461_LDR3);
|
||||
lcdclor = hitfb_readw(HD64461_LCDCLOR);
|
||||
ldvndr = hitfb_readw(HD64461_LDVNDR);
|
||||
ldr3 = hitfb_readw(HD64461_LDR3);
|
||||
|
||||
switch (ldr3 & 15) {
|
||||
default:
|
||||
@ -429,9 +445,9 @@ static int hitfb_suspend(struct device *dev)
|
||||
u16 v;
|
||||
|
||||
hitfb_blank(1,0);
|
||||
v = fb_readw(HD64461_STBCR);
|
||||
v = hitfb_readw(HD64461_STBCR);
|
||||
v |= HD64461_STBCR_SLCKE_IST;
|
||||
fb_writew(v, HD64461_STBCR);
|
||||
hitfb_writew(v, HD64461_STBCR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -440,12 +456,12 @@ static int hitfb_resume(struct device *dev)
|
||||
{
|
||||
u16 v;
|
||||
|
||||
v = fb_readw(HD64461_STBCR);
|
||||
v = hitfb_readw(HD64461_STBCR);
|
||||
v &= ~HD64461_STBCR_SLCKE_OST;
|
||||
msleep(100);
|
||||
v = fb_readw(HD64461_STBCR);
|
||||
v = hitfb_readw(HD64461_STBCR);
|
||||
v &= ~HD64461_STBCR_SLCKE_IST;
|
||||
fb_writew(v, HD64461_STBCR);
|
||||
hitfb_writew(v, HD64461_STBCR);
|
||||
hitfb_blank(0,0);
|
||||
|
||||
return 0;
|
||||
|
@ -737,7 +737,7 @@ static int kyrofb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
info->var.bits_per_pixel);
|
||||
size *= info->var.yres_virtual;
|
||||
|
||||
fb_memset(info->screen_base, 0, size);
|
||||
fb_memset_io(info->screen_base, 0, size);
|
||||
|
||||
if (register_framebuffer(info) < 0)
|
||||
goto out_unmap;
|
||||
|
@ -88,7 +88,7 @@
|
||||
|
||||
static inline void matrox_cfb4_pal(u_int32_t* pal) {
|
||||
unsigned int i;
|
||||
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
pal[i] = i * 0x11111111U;
|
||||
}
|
||||
@ -96,7 +96,7 @@ static inline void matrox_cfb4_pal(u_int32_t* pal) {
|
||||
|
||||
static inline void matrox_cfb8_pal(u_int32_t* pal) {
|
||||
unsigned int i;
|
||||
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
pal[i] = i * 0x01010101U;
|
||||
}
|
||||
@ -482,7 +482,7 @@ static void matroxfb_1bpp_imageblit(struct matrox_fb_info *minfo, u_int32_t fgx,
|
||||
/* Tell... well, why bother... */
|
||||
while (height--) {
|
||||
size_t i;
|
||||
|
||||
|
||||
for (i = 0; i < step; i += 4) {
|
||||
/* Hope that there are at least three readable bytes beyond the end of bitmap */
|
||||
fb_writel(get_unaligned((u_int32_t*)(chardata + i)),mmio.vaddr);
|
||||
|
@ -301,9 +301,9 @@ struct matrox_altout {
|
||||
int (*verifymode)(void* altout_dev, u_int32_t mode);
|
||||
int (*getqueryctrl)(void* altout_dev,
|
||||
struct v4l2_queryctrl* ctrl);
|
||||
int (*getctrl)(void* altout_dev,
|
||||
int (*getctrl)(void *altout_dev,
|
||||
struct v4l2_control* ctrl);
|
||||
int (*setctrl)(void* altout_dev,
|
||||
int (*setctrl)(void *altout_dev,
|
||||
struct v4l2_control* ctrl);
|
||||
};
|
||||
|
||||
|
@ -801,7 +801,7 @@ static int __maybe_unused pvr2fb_common_init(void)
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len);
|
||||
fb_memset_io(fb_info->screen_base, 0, pvr2_fix.smem_len);
|
||||
|
||||
pvr2_fix.ypanstep = nopan ? 0 : 1;
|
||||
pvr2_fix.ywrapstep = nowrap ? 0 : 1;
|
||||
|
@ -335,7 +335,7 @@ static int sst_calc_pll(const int freq, int *freq_out, struct pll_timing *t)
|
||||
static void sstfb_clear_screen(struct fb_info *info)
|
||||
{
|
||||
/* clear screen */
|
||||
fb_memset(info->screen_base, 0, info->fix.smem_len);
|
||||
fb_memset_io(info->screen_base, 0, info->fix.smem_len);
|
||||
}
|
||||
|
||||
|
||||
|
@ -527,8 +527,8 @@ rattlerSetupPlanes(struct stifb_info *fb)
|
||||
fb->id = saved_id;
|
||||
|
||||
for (y = 0; y < fb->info.var.yres; ++y)
|
||||
fb_memset(fb->info.screen_base + y * fb->info.fix.line_length,
|
||||
0xff, fb->info.var.xres * fb->info.var.bits_per_pixel/8);
|
||||
fb_memset_io(fb->info.screen_base + y * fb->info.fix.line_length,
|
||||
0xff, fb->info.var.xres * fb->info.var.bits_per_pixel/8);
|
||||
|
||||
CRX24_SET_OVLY_MASK(fb);
|
||||
SETUP_FB(fb);
|
||||
|
@ -1116,7 +1116,7 @@ static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
|
||||
u8 *mask = (u8 *)cursor->mask;
|
||||
int i;
|
||||
|
||||
fb_memset(cursorbase, 0, 1024);
|
||||
fb_memset_io(cursorbase, 0, 1024);
|
||||
|
||||
for (i = 0; i < cursor->image.height; i++) {
|
||||
int h = 0;
|
||||
|
@ -9,7 +9,9 @@
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include "core/fb_draw.h"
|
||||
#include "wmt_ge_rops.h"
|
||||
|
||||
|
@ -7,6 +7,7 @@
|
||||
* Only include this header file from your architecture's <asm/fb.h>.
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/mm_types.h>
|
||||
#include <linux/pgtable.h>
|
||||
|
||||
@ -30,4 +31,105 @@ static inline int fb_is_primary_device(struct fb_info *info)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* I/O helpers for the framebuffer. Prefer these functions over their
|
||||
* regular counterparts. The regular I/O functions provide in-order
|
||||
* access and swap bytes to/from little-endian ordering. Neither is
|
||||
* required for framebuffers. Instead, the helpers read and write
|
||||
* raw framebuffer data. Independent operations can be reordered for
|
||||
* improved performance.
|
||||
*/
|
||||
|
||||
#ifndef fb_readb
|
||||
static inline u8 fb_readb(const volatile void __iomem *addr)
|
||||
{
|
||||
return __raw_readb(addr);
|
||||
}
|
||||
#define fb_readb fb_readb
|
||||
#endif
|
||||
|
||||
#ifndef fb_readw
|
||||
static inline u16 fb_readw(const volatile void __iomem *addr)
|
||||
{
|
||||
return __raw_readw(addr);
|
||||
}
|
||||
#define fb_readw fb_readw
|
||||
#endif
|
||||
|
||||
#ifndef fb_readl
|
||||
static inline u32 fb_readl(const volatile void __iomem *addr)
|
||||
{
|
||||
return __raw_readl(addr);
|
||||
}
|
||||
#define fb_readl fb_readl
|
||||
#endif
|
||||
|
||||
#ifndef fb_readq
|
||||
#if defined(__raw_readq)
|
||||
static inline u64 fb_readq(const volatile void __iomem *addr)
|
||||
{
|
||||
return __raw_readq(addr);
|
||||
}
|
||||
#define fb_readq fb_readq
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef fb_writeb
|
||||
static inline void fb_writeb(u8 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeb(b, addr);
|
||||
}
|
||||
#define fb_writeb fb_writeb
|
||||
#endif
|
||||
|
||||
#ifndef fb_writew
|
||||
static inline void fb_writew(u16 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writew(b, addr);
|
||||
}
|
||||
#define fb_writew fb_writew
|
||||
#endif
|
||||
|
||||
#ifndef fb_writel
|
||||
static inline void fb_writel(u32 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writel(b, addr);
|
||||
}
|
||||
#define fb_writel fb_writel
|
||||
#endif
|
||||
|
||||
#ifndef fb_writeq
|
||||
#if defined(__raw_writeq)
|
||||
static inline void fb_writeq(u64 b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeq(b, addr);
|
||||
}
|
||||
#define fb_writeq fb_writeq
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef fb_memcpy_fromio
|
||||
static inline void fb_memcpy_fromio(void *to, const volatile void __iomem *from, size_t n)
|
||||
{
|
||||
memcpy_fromio(to, from, n);
|
||||
}
|
||||
#define fb_memcpy_fromio fb_memcpy_fromio
|
||||
#endif
|
||||
|
||||
#ifndef fb_memcpy_toio
|
||||
static inline void fb_memcpy_toio(volatile void __iomem *to, const void *from, size_t n)
|
||||
{
|
||||
memcpy_toio(to, from, n);
|
||||
}
|
||||
#define fb_memcpy_toio fb_memcpy_toio
|
||||
#endif
|
||||
|
||||
#ifndef fb_memset
|
||||
static inline void fb_memset_io(volatile void __iomem *addr, int c, size_t n)
|
||||
{
|
||||
memset_io(addr, c, n);
|
||||
}
|
||||
#define fb_memset fb_memset_io
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_GENERIC_FB_H_ */
|
||||
|
@ -95,6 +95,8 @@ struct samsung_dsim {
|
||||
u32 mode_flags;
|
||||
u32 format;
|
||||
|
||||
bool swap_dn_dp_clk;
|
||||
bool swap_dn_dp_data;
|
||||
int state;
|
||||
struct drm_property *brightness;
|
||||
struct completion completed;
|
||||
|
@ -71,6 +71,7 @@ static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B)
|
||||
}
|
||||
|
||||
#define DRM_FIXED_POINT 32
|
||||
#define DRM_FIXED_POINT_HALF 16
|
||||
#define DRM_FIXED_ONE (1ULL << DRM_FIXED_POINT)
|
||||
#define DRM_FIXED_DECIMAL_MASK (DRM_FIXED_ONE - 1)
|
||||
#define DRM_FIXED_DIGITS_MASK (~DRM_FIXED_DECIMAL_MASK)
|
||||
@ -87,6 +88,11 @@ static inline int drm_fixp2int(s64 a)
|
||||
return ((s64)a) >> DRM_FIXED_POINT;
|
||||
}
|
||||
|
||||
static inline int drm_fixp2int_round(s64 a)
|
||||
{
|
||||
return drm_fixp2int(a + (1 << (DRM_FIXED_POINT_HALF - 1)));
|
||||
}
|
||||
|
||||
static inline int drm_fixp2int_ceil(s64 a)
|
||||
{
|
||||
if (a > 0)
|
||||
|
@ -549,7 +549,7 @@ void drm_sched_entity_modify_sched(struct drm_sched_entity *entity,
|
||||
unsigned int num_sched_list);
|
||||
|
||||
void drm_sched_job_cleanup(struct drm_sched_job *job);
|
||||
void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
|
||||
void drm_sched_wakeup_if_can_queue(struct drm_gpu_scheduler *sched);
|
||||
void drm_sched_stop(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad);
|
||||
void drm_sched_start(struct drm_gpu_scheduler *sched, bool full_recovery);
|
||||
void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched);
|
||||
|
@ -223,7 +223,7 @@ struct ttm_device {
|
||||
* @funcs: Function table for the device.
|
||||
* Constant after bo device init
|
||||
*/
|
||||
struct ttm_device_funcs *funcs;
|
||||
const struct ttm_device_funcs *funcs;
|
||||
|
||||
/**
|
||||
* @sysman: Resource manager for the system domain.
|
||||
@ -287,7 +287,7 @@ static inline void ttm_set_driver_manager(struct ttm_device *bdev, int type,
|
||||
bdev->man_drv[type] = manager;
|
||||
}
|
||||
|
||||
int ttm_device_init(struct ttm_device *bdev, struct ttm_device_funcs *funcs,
|
||||
int ttm_device_init(struct ttm_device *bdev, const struct ttm_device_funcs *funcs,
|
||||
struct device *dev, struct address_space *mapping,
|
||||
struct drm_vma_offset_manager *vma_manager,
|
||||
bool use_dma_alloc, bool use_dma32);
|
||||
|
@ -15,7 +15,8 @@
|
||||
#include <linux/list.h>
|
||||
#include <linux/backlight.h>
|
||||
#include <linux/slab.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include <asm/fb.h>
|
||||
|
||||
struct vm_area_struct;
|
||||
struct fb_info;
|
||||
@ -511,58 +512,6 @@ struct fb_info {
|
||||
*/
|
||||
#define STUPID_ACCELF_TEXT_SHIT
|
||||
|
||||
// This will go away
|
||||
#if defined(__sparc__)
|
||||
|
||||
/* We map all of our framebuffers such that big-endian accesses
|
||||
* are what we want, so the following is sufficient.
|
||||
*/
|
||||
|
||||
// This will go away
|
||||
#define fb_readb sbus_readb
|
||||
#define fb_readw sbus_readw
|
||||
#define fb_readl sbus_readl
|
||||
#define fb_readq sbus_readq
|
||||
#define fb_writeb sbus_writeb
|
||||
#define fb_writew sbus_writew
|
||||
#define fb_writel sbus_writel
|
||||
#define fb_writeq sbus_writeq
|
||||
#define fb_memset sbus_memset_io
|
||||
#define fb_memcpy_fromfb sbus_memcpy_fromio
|
||||
#define fb_memcpy_tofb sbus_memcpy_toio
|
||||
|
||||
#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || \
|
||||
defined(__hppa__) || defined(__sh__) || defined(__powerpc__) || \
|
||||
defined(__arm__) || defined(__aarch64__) || defined(__mips__)
|
||||
|
||||
#define fb_readb __raw_readb
|
||||
#define fb_readw __raw_readw
|
||||
#define fb_readl __raw_readl
|
||||
#define fb_readq __raw_readq
|
||||
#define fb_writeb __raw_writeb
|
||||
#define fb_writew __raw_writew
|
||||
#define fb_writel __raw_writel
|
||||
#define fb_writeq __raw_writeq
|
||||
#define fb_memset memset_io
|
||||
#define fb_memcpy_fromfb memcpy_fromio
|
||||
#define fb_memcpy_tofb memcpy_toio
|
||||
|
||||
#else
|
||||
|
||||
#define fb_readb(addr) (*(volatile u8 *) (addr))
|
||||
#define fb_readw(addr) (*(volatile u16 *) (addr))
|
||||
#define fb_readl(addr) (*(volatile u32 *) (addr))
|
||||
#define fb_readq(addr) (*(volatile u64 *) (addr))
|
||||
#define fb_writeb(b,addr) (*(volatile u8 *) (addr) = (b))
|
||||
#define fb_writew(b,addr) (*(volatile u16 *) (addr) = (b))
|
||||
#define fb_writel(b,addr) (*(volatile u32 *) (addr) = (b))
|
||||
#define fb_writeq(b,addr) (*(volatile u64 *) (addr) = (b))
|
||||
#define fb_memset memset
|
||||
#define fb_memcpy_fromfb memcpy
|
||||
#define fb_memcpy_tofb memcpy
|
||||
|
||||
#endif
|
||||
|
||||
#define FB_LEFT_POS(p, bpp) (fb_be_math(p) ? (32 - (bpp)) : 0)
|
||||
#define FB_SHIFT_HIGH(p, val, bits) (fb_be_math(p) ? (val) >> (bits) : \
|
||||
(val) << (bits))
|
||||
|
Loading…
x
Reference in New Issue
Block a user