ath10k: adjust the RX packet pad offset at QCA99X0 4addr mode
The QCA99X0 4 addresses RX packets pad 2 bytes at the beginning of MSDU instead the end of ieee80211 header to keep alignment. The currently RX data path can't parse the header correctly in this case. This patch fixes it for QCA99X0. Signed-off-by: Yanbo Li <yanbol@qca.qualcomm.com> [kvalo@qca.qualcomm.com: checkpatch fixes and naming changes] Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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@ -58,6 +58,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
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.fw = {
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.dir = QCA988X_HW_2_0_FW_DIR,
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.fw = QCA988X_HW_2_0_FW_FILE,
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@ -75,6 +76,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
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.fw = {
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.dir = QCA6174_HW_2_1_FW_DIR,
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.fw = QCA6174_HW_2_1_FW_FILE,
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@ -92,6 +94,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
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.fw = {
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.dir = QCA6174_HW_3_0_FW_DIR,
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.fw = QCA6174_HW_3_0_FW_FILE,
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@ -109,6 +112,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
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.fw = {
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/* uses same binaries as hw3.0 */
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.dir = QCA6174_HW_3_0_FW_DIR,
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@ -128,6 +132,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.continuous_frag_desc = true,
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.channel_counters_freq_hz = 150000,
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.max_probe_resp_desc_thres = 24,
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.hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
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.fw = {
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.dir = QCA99X0_HW_2_0_FW_DIR,
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.fw = QCA99X0_HW_2_0_FW_FILE,
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