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arm64: dts: rockchip: don't set cpll rate for Odroid Go

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The Odroid Go Advance devicetree tries to set the rate for the cpll
clock to 17MHz, which is not a supported rate. This fails, and triggers
the error of "clk: couldn't set cpll clk rate to 17000000 (-22),
current rate: 17000000" in the dmesg log. Remove the incorrect rate.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20221201203655.1245-3-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Chris Morgan 2022-12-01 14:36:53 -06:00 committed by Heiko Stuebner
parent 0d43439881
commit b8e3a0ff76
1 changed files with 2 additions and 4 deletions
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6
arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi
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@ -192,14 +192,12 @@
assigned-clocks = <&cru PLL_NPLL>,
<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>,
<&cru PLL_CPLL>;
<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>;
assigned-clock-rates = <1188000000>,
<200000000>, <200000000>,
<150000000>, <150000000>,
<100000000>, <200000000>,
<17000000>;
<100000000>, <200000000>;
};
&display_subsystem {