parisc: Check for valid stride size for cache flushes
Report if the calculated cache stride size is zero, otherwise the cache flushing routine will never finish and hang the machine. This can be reproduced with a testcase in qemu, where the firmware reports wrong cache values. Signed-off-by: Helge Deller <deller@gmx.de>
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@ -264,6 +264,10 @@ parisc_cache_init(void)
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icache_stride = CAFL_STRIDE(cache_info.ic_conf);
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icache_stride = CAFL_STRIDE(cache_info.ic_conf);
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#undef CAFL_STRIDE
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#undef CAFL_STRIDE
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/* stride needs to be non-zero, otherwise cache flushes will not work */
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WARN_ON(cache_info.dc_size && dcache_stride == 0);
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WARN_ON(cache_info.ic_size && icache_stride == 0);
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if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==
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if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==
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PDC_MODEL_NVA_UNSUPPORTED) {
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PDC_MODEL_NVA_UNSUPPORTED) {
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printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");
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printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");
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