parisc: Check for valid stride size for cache flushes

Report if the calculated cache stride size is zero, otherwise the cache
flushing routine will never finish and hang the machine.
This can be reproduced with a testcase in qemu, where the firmware reports
wrong cache values.

Signed-off-by: Helge Deller <deller@gmx.de>
This commit is contained in:
Helge Deller 2024-01-17 17:46:43 +01:00
parent 2751153b99
commit b9402e3b97

View File

@ -264,6 +264,10 @@ parisc_cache_init(void)
icache_stride = CAFL_STRIDE(cache_info.ic_conf); icache_stride = CAFL_STRIDE(cache_info.ic_conf);
#undef CAFL_STRIDE #undef CAFL_STRIDE
/* stride needs to be non-zero, otherwise cache flushes will not work */
WARN_ON(cache_info.dc_size && dcache_stride == 0);
WARN_ON(cache_info.ic_size && icache_stride == 0);
if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) == if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==
PDC_MODEL_NVA_UNSUPPORTED) { PDC_MODEL_NVA_UNSUPPORTED) {
printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n"); printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");