drm/amdgpu: ensure no PCIe peer access for CPU XGMI iolinks
[Why] Devices with CPU XGMI iolink do not support PCIe peer access. Signed-off-by: Alex Sierra <alex.sierra@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -5524,7 +5524,8 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
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~*peer_adev->dev->dma_mask : ~((1ULL << 32) - 1);
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resource_size_t aper_limit =
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adev->gmc.aper_base + adev->gmc.aper_size - 1;
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bool p2p_access = !(pci_p2pdma_distance_many(adev->pdev,
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bool p2p_access = !adev->gmc.xgmi.connected_to_cpu &&
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!(pci_p2pdma_distance_many(adev->pdev,
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&peer_adev->dev, 1, true) < 0);
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return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size &&
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