drm/amdgpu: align GTT start to 4GB v2
For VCE to work properly the start of the GTT space must be aligned to a 4GB boundary. v2: add comment why we do this Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -622,7 +622,10 @@ void amdgpu_gart_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
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dev_warn(adev->dev, "limiting GTT\n");
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mc->gart_size = size_af;
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}
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mc->gart_start = mc->vram_end + 1;
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/* VCE doesn't like it when BOs cross a 4GB segment, so align
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* the GART base on a 4GB boundary as well.
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*/
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mc->gart_start = ALIGN(mc->vram_end + 1, 0x100000000ULL);
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}
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mc->gart_end = mc->gart_start + mc->gart_size - 1;
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dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n",
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