iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Thermal control fix for 5.16-rc5

Browse Source 
Fix the definition of one of the Tiger Lake MMIO registers in the
 int340x thermal driver (Sumeet Pawnikar).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmGzrbMSHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxVokQAIpCQJ0m7qrG61hcrDHEKjOJFVrWs3CF
 ombKEUZHTqqjvzzETMfiJQjq8+FXdpWFMQPzUdNm5NuhOkJY711O8N6WWKwStC9P
 HGPDAoI5mzR8TpdZjeCMSFgf7sVunrZfWROfdxd/L5ySJby6sCGOJhJ11Cre/shY
 3Pq3WhjJj6WA7eK6eyv+dTibD+l8qdkhNZmuaJJoi6/gVF/T7w+r+6FNbT/cyJc+
 rT3ETCs5vVK9D5Xv1/URj5km+6mCVHXl/KLZ4gzAo2h6WXfbF+Sh2VTaml9a36Vv
 plzJh5S/3Npg1ijcswiHzCgTqlS7ba4raxv4PpMS35fQbjELCHDiqcYJ/C911lpx
 FYZtJ9+UMRKsAc42pFJ9lvso6nyhYxAO5fJkcCqX9JqmslpAGTfBtyx6tHp8X6ey
 oIccz3qrdfnsADfGYftML0D4zWBzeZ9NZewaElUU2cj6xNs30fQ+VAeApA/1OIHA
 C9a2d1S8CwkDCOFFW0j2/wLjgeQ+99VPRf3xKiZbG2tpecw/It+npKcGjR6UOUMi
 EJ0pdiwu7htGNTnJTwtfhKQuzvAe/Dzcru55an/i4uJz+ARu4ZlypEOj0PIax50C
 ZAQ9FqLmA4fF9CbFR2kaEkrdgDkrb7eUqCRUdawPzSmWyULL6Sr30eHHTyfQkDBH
 G6ltCwAkNQW5
 =pl8B
 -----END PGP SIGNATURE-----

Merge tag 'thermal-5.16-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull thermal control fix from Rafael Wysocki:
 "Fix the definition of one of the Tiger Lake MMIO registers in the
  int340x thermal driver (Sumeet Pawnikar)"

* tag 'thermal-5.16-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  thermal: int340x: Fix VCoRefLow MMIO bit offset for TGL
This commit is contained in:
Linus Torvalds 2021-12-10 17:02:46 -08:00
commit b9902641b5
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c
View File

@ -29,7 +29,7 @@ static const char * const fivr_strings[] = {
};
static const struct mmio_reg tgl_fivr_mmio_regs[] = {
{ 0, 0x5A18, 3, 0x7, 12}, /* vco_ref_code_lo */
{ 0, 0x5A18, 3, 0x7, 11}, /* vco_ref_code_lo */
{ 0, 0x5A18, 8, 0xFF, 16}, /* vco_ref_code_hi */
{ 0, 0x5A08, 8, 0xFF, 0}, /* spread_spectrum_pct */
{ 0, 0x5A08, 1, 0x1, 8}, /* spread_spectrum_clk_enable */