riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs

The StarFive JH7100 SoC has non-coherent device DMAs, so mark the
soc bus as such.

Link: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Cache%20Coherence%20V1.0.pdf
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Emil Renner Berthing 2023-11-30 16:19:27 +01:00 committed by Conor Dooley
parent dd3c1b365f
commit ba0074972e

View File

@ -144,6 +144,7 @@
interrupt-parent = <&plic>;
#address-cells = <2>;
#size-cells = <2>;
dma-noncoherent;
ranges;
clint: clint@2000000 {