drm/xe: Assume MTL's forcewake register continues to future platforms

Starting with MTL, the GT forcewake ack register moved from 0x130044 to
0xDFC.  We expect this change to carry forward to future platforms as
well, so forcewake initialization should use an IP version check instead
of matching the MTL platform specifically.

The (re)definition of FORCEWAKE_ACK_GT_MTL in the forcewake file is also
unnecessary; we can take the definition that already exists in the
dedicated register header.

Bspec: 65031, 64629
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Matt Roper 2023-02-24 14:16:01 -08:00 committed by Rodrigo Vivi
parent 74f800c7a9
commit ba11f1b7ea

View File

@ -36,8 +36,6 @@ static void domain_init(struct xe_force_wake_domain *domain,
domain->mask = mask;
}
#define FORCEWAKE_ACK_GT_MTL _MMIO(0xdfc)
void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
@ -48,7 +46,7 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
/* Assuming gen11+ so assert this assumption is correct */
XE_BUG_ON(GRAPHICS_VER(gt_to_xe(gt)) < 11);
if (xe->info.platform == XE_METEORLAKE) {
if (xe->info.graphics_verx100 >= 1270) {
domain_init(&fw->domains[XE_FW_DOMAIN_ID_GT],
XE_FW_DOMAIN_ID_GT,
FORCEWAKE_GT_GEN9.reg,