iwlagn: set tx_fifo for ampdu in transport layer
the mapping tx_queue -> fifo is really transport related. The upper layer should be involved in such things. Note that upon agg_disable, the queue is always mapped to fifo 0, but this doesn't matter since when the queue will be setup again for a new BA session, it will be configured to the good fifo anyway. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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2c452297ff
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@ -42,43 +42,6 @@
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#include "iwl-agn.h"
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#include "iwl-trans.h"
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/*
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* mac80211 queues, ACs, hardware queues, FIFOs.
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*
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* Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
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*
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* Mac80211 uses the following numbers, which we get as from it
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* by way of skb_get_queue_mapping(skb):
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*
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* VO 0
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* VI 1
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* BE 2
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* BK 3
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*
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*
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* Regular (not A-MPDU) frames are put into hardware queues corresponding
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* to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
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* own queue per aggregation session (RA/TID combination), such queues are
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* set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
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* order to map frames to the right queue, we also need an AC->hw queue
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* mapping. This is implemented here.
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*
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* Due to the way hw queues are set up (by the hw specific modules like
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* iwl-4965.c, iwl-5000.c etc.), the AC->hw queue mapping is the identity
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* mapping.
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*/
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static const u8 tid_to_ac[] = {
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IEEE80211_AC_BE,
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IEEE80211_AC_BK,
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IEEE80211_AC_BK,
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IEEE80211_AC_BE,
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IEEE80211_AC_VI,
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IEEE80211_AC_VI,
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IEEE80211_AC_VO,
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IEEE80211_AC_VO
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};
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static inline int get_ac_from_tid(u16 tid)
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{
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if (likely(tid < ARRAY_SIZE(tid_to_ac)))
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@ -88,15 +51,6 @@ static inline int get_ac_from_tid(u16 tid)
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return -EINVAL;
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}
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static inline int get_fifo_from_tid(struct iwl_rxon_context *ctx, u16 tid)
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{
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if (likely(tid < ARRAY_SIZE(tid_to_ac)))
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return ctx->ac_to_fifo[tid_to_ac[tid]];
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/* no support for TIDs 8-15 yet */
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return -EINVAL;
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}
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static int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, int sta_id,
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int tid)
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{
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@ -508,16 +462,11 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta, u16 tid, u16 *ssn)
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{
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int sta_id;
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int tx_fifo;
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int txq_id;
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int ret;
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unsigned long flags;
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struct iwl_tid_data *tid_data;
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tx_fifo = get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif), tid);
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if (unlikely(tx_fifo < 0))
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return tx_fifo;
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IWL_DEBUG_HT(priv, "TX AGG request on ra = %pM tid = %d\n",
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sta->addr, tid);
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@ -544,7 +493,6 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
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tid_data = &priv->shrd->tid_data[sta_id][tid];
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*ssn = SEQ_TO_SN(tid_data->seq_number);
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tid_data->agg.txq_id = txq_id;
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tid_data->agg.tx_fifo = tx_fifo;
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iwl_set_swq_id(&priv->txq[txq_id], get_ac_from_tid(tid), txq_id);
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spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
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@ -570,15 +518,11 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
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int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta, u16 tid)
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{
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int tx_fifo_id, txq_id, sta_id, ssn;
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int txq_id, sta_id, ssn;
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struct iwl_tid_data *tid_data;
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int write_ptr, read_ptr;
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unsigned long flags;
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tx_fifo_id = get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif), tid);
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if (unlikely(tx_fifo_id < 0))
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return tx_fifo_id;
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sta_id = iwl_sta_id(sta);
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if (sta_id == IWL_INVALID_STATION) {
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@ -635,7 +579,7 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
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* to deactivate the uCode queue, just return "success" to allow
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* mac80211 to clean up it own data.
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*/
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iwl_trans_txq_agg_disable(trans(priv), txq_id, ssn, tx_fifo_id);
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iwl_trans_txq_agg_disable(trans(priv), txq_id);
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spin_unlock_irqrestore(&priv->shrd->lock, flags);
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ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
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@ -661,11 +605,8 @@ static int iwlagn_txq_check_empty(struct iwl_priv *priv,
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/* aggregated HW queue */
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if ((txq_id == tid_data->agg.txq_id) &&
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(q->read_ptr == q->write_ptr)) {
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u16 ssn = SEQ_TO_SN(tid_data->seq_number);
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int tx_fifo = get_fifo_from_tid(ctx, tid);
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IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n");
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iwl_trans_txq_agg_disable(trans(priv), txq_id,
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ssn, tx_fifo);
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iwl_trans_txq_agg_disable(trans(priv), txq_id);
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tid_data->agg.state = IWL_AGG_OFF;
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ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
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}
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@ -2534,6 +2534,7 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
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struct iwl_priv *priv = hw->priv;
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int ret = -EINVAL;
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struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
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struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
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IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
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sta->addr, tid);
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@ -2587,8 +2588,8 @@ static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
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case IEEE80211_AMPDU_TX_OPERATIONAL:
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buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
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iwl_trans_txq_agg_setup(trans(priv), iwl_sta_id(sta), tid,
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buf_size);
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iwl_trans_txq_agg_setup(trans(priv), ctx->ctxid, iwl_sta_id(sta),
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tid, buf_size);
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/*
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* If the limit is 0, then it wasn't initialised yet,
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@ -961,13 +961,6 @@ struct iwl_notification_wait {
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bool triggered, aborted;
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};
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enum iwl_rxon_context_id {
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IWL_RXON_CTX_BSS,
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IWL_RXON_CTX_PAN,
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NUM_IWL_RXON_CTX
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};
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struct iwl_rxon_context {
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struct ieee80211_vif *vif;
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@ -67,6 +67,7 @@
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/gfp.h>
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#include <net/mac80211.h>
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#include "iwl-commands.h"
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@ -192,7 +193,6 @@ struct iwl_ht_agg {
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#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
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#define IWL_EMPTYING_HW_QUEUE_DELBA 3
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u8 state;
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u8 tx_fifo;
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};
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struct iwl_tid_data {
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@ -284,6 +284,50 @@ struct iwl_rx_mem_buffer {
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#define rxb_addr(r) page_address(r->page)
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/*
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* mac80211 queues, ACs, hardware queues, FIFOs.
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*
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* Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
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*
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* Mac80211 uses the following numbers, which we get as from it
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* by way of skb_get_queue_mapping(skb):
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*
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* VO 0
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* VI 1
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* BE 2
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* BK 3
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*
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*
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* Regular (not A-MPDU) frames are put into hardware queues corresponding
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* to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
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* own queue per aggregation session (RA/TID combination), such queues are
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* set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
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* order to map frames to the right queue, we also need an AC->hw queue
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* mapping. This is implemented here.
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*
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* Due to the way hw queues are set up (by the hw specific modules like
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* iwl-4965.c, iwl-5000.c etc.), the AC->hw queue mapping is the identity
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* mapping.
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*/
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static const u8 tid_to_ac[] = {
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IEEE80211_AC_BE,
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IEEE80211_AC_BK,
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IEEE80211_AC_BK,
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IEEE80211_AC_BE,
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IEEE80211_AC_VI,
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IEEE80211_AC_VI,
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IEEE80211_AC_VO,
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IEEE80211_AC_VO
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};
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enum iwl_rxon_context_id {
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IWL_RXON_CTX_BSS,
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IWL_RXON_CTX_PAN,
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NUM_IWL_RXON_CTX
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};
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#ifdef CONFIG_PM
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int iwl_suspend(struct iwl_priv *priv);
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int iwl_resume(struct iwl_priv *priv);
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@ -175,14 +175,14 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
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void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans,
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struct iwl_tx_queue *txq,
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u16 byte_cnt);
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int iwl_trans_pcie_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
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u16 ssn_idx, u8 tx_fifo);
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int iwl_trans_pcie_txq_agg_disable(struct iwl_priv *priv, u16 txq_id);
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void iwl_trans_set_wr_ptrs(struct iwl_trans *trans, int txq_id, u32 index);
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void iwl_trans_tx_queue_set_status(struct iwl_priv *priv,
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struct iwl_tx_queue *txq,
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int tx_fifo_id, int scd_retry);
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void iwl_trans_pcie_txq_agg_setup(struct iwl_priv *priv, int sta_id, int tid,
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int frame_limit);
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void iwl_trans_pcie_txq_agg_setup(struct iwl_priv *priv,
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enum iwl_rxon_context_id ctx,
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int sta_id, int tid, int frame_limit);
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void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq,
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int index);
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void iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index,
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@ -424,8 +424,18 @@ void iwl_trans_tx_queue_set_status(struct iwl_priv *priv,
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scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id);
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}
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void iwl_trans_pcie_txq_agg_setup(struct iwl_priv *priv, int sta_id, int tid,
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int frame_limit)
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static inline int get_fifo_from_tid(struct iwl_rxon_context *ctx, u16 tid)
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{
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if (likely(tid < ARRAY_SIZE(tid_to_ac)))
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return ctx->ac_to_fifo[tid_to_ac[tid]];
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/* no support for TIDs 8-15 yet */
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return -EINVAL;
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}
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void iwl_trans_pcie_txq_agg_setup(struct iwl_priv *priv,
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enum iwl_rxon_context_id ctx, int sta_id,
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int tid, int frame_limit)
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{
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int tx_fifo, txq_id, ssn_idx;
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u16 ra_tid;
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@ -441,11 +451,16 @@ void iwl_trans_pcie_txq_agg_setup(struct iwl_priv *priv, int sta_id, int tid,
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if (WARN_ON(tid >= IWL_MAX_TID_COUNT))
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return;
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tx_fifo = get_fifo_from_tid(&priv->contexts[ctx], tid);
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if (WARN_ON(tx_fifo < 0)) {
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IWL_ERR(trans, "txq_agg_setup, bad fifo: %d\n", tx_fifo);
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return;
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}
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spin_lock_irqsave(&priv->shrd->sta_lock, flags);
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tid_data = &priv->shrd->tid_data[sta_id][tid];
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ssn_idx = SEQ_TO_SN(tid_data->seq_number);
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txq_id = tid_data->agg.txq_id;
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tx_fifo = tid_data->agg.tx_fifo;
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spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
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ra_tid = BUILD_RAxTID(sta_id, tid);
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@ -492,8 +507,7 @@ void iwl_trans_pcie_txq_agg_setup(struct iwl_priv *priv, int sta_id, int tid,
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spin_unlock_irqrestore(&priv->shrd->lock, flags);
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}
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int iwl_trans_pcie_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
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u16 ssn_idx, u8 tx_fifo)
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int iwl_trans_pcie_txq_agg_disable(struct iwl_priv *priv, u16 txq_id)
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{
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struct iwl_trans *trans = trans(priv);
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if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
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@ -511,14 +525,14 @@ int iwl_trans_pcie_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
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iwl_clear_bits_prph(bus(priv), SCD_AGGR_SEL, (1 << txq_id));
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priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
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priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
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priv->txq[txq_id].q.read_ptr = 0;
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priv->txq[txq_id].q.write_ptr = 0;
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/* supposes that ssn_idx is valid (!= 0xFFF) */
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iwl_trans_set_wr_ptrs(trans, txq_id, ssn_idx);
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iwl_trans_set_wr_ptrs(trans, txq_id, 0);
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iwl_clear_bits_prph(bus(priv), SCD_INTERRUPT_MASK, (1 << txq_id));
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iwl_txq_ctx_deactivate(priv, txq_id);
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iwl_trans_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
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iwl_trans_tx_queue_set_status(priv, &priv->txq[txq_id], 0, 0);
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return 0;
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}
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@ -123,10 +123,10 @@ struct iwl_trans_ops {
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void (*reclaim)(struct iwl_trans *trans, int txq_id, int ssn,
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u32 status, struct sk_buff_head *skbs);
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int (*txq_agg_disable)(struct iwl_priv *priv, u16 txq_id,
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u16 ssn_idx, u8 tx_fifo);
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void (*txq_agg_setup)(struct iwl_priv *priv, int sta_id, int tid,
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int frame_limit);
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int (*txq_agg_disable)(struct iwl_priv *priv, u16 txq_id);
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void (*txq_agg_setup)(struct iwl_priv *priv,
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enum iwl_rxon_context_id ctx, int sta_id,
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int tid, int frame_limit);
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void (*kick_nic)(struct iwl_trans *trans);
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@ -209,17 +209,17 @@ static inline void iwl_trans_reclaim(struct iwl_trans *trans, int txq_id,
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trans->ops->reclaim(trans, txq_id, ssn, status, skbs);
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}
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static inline int iwl_trans_txq_agg_disable(struct iwl_trans *trans, u16 txq_id,
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u16 ssn_idx, u8 tx_fifo)
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static inline int iwl_trans_txq_agg_disable(struct iwl_trans *trans, u16 txq_id)
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{
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return trans->ops->txq_agg_disable(priv(trans), txq_id,
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ssn_idx, tx_fifo);
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return trans->ops->txq_agg_disable(priv(trans), txq_id);
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}
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static inline void iwl_trans_txq_agg_setup(struct iwl_trans *trans, int sta_id,
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int tid, int frame_limit)
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static inline void iwl_trans_txq_agg_setup(struct iwl_trans *trans,
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enum iwl_rxon_context_id ctx,
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int sta_id, int tid,
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int frame_limit)
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{
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trans->ops->txq_agg_setup(priv(trans), sta_id, tid, frame_limit);
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trans->ops->txq_agg_setup(priv(trans), ctx, sta_id, tid, frame_limit);
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}
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static inline void iwl_trans_kick_nic(struct iwl_trans *trans)
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