dt-bindings: gpio: gpio-xilinx: Convert Xilinx axi gpio binding to YAML
Convert Xilinx axi gpio binding documentation to YAML. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
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Xilinx plb/axi GPIO controller
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Dual channel GPIO controller with configurable number of pins
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(from 1 to 32 per channel). Every pin can be configured as
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input/output/tristate. Both channels share the same global IRQ but
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local interrupts can be enabled on channel basis.
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Required properties:
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- compatible : Should be "xlnx,xps-gpio-1.00.a"
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- reg : Address and length of the register set for the device
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- #gpio-cells : Should be two. The first cell is the pin number and the
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second cell is used to specify optional parameters (currently unused).
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- gpio-controller : Marks the device node as a GPIO controller.
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Optional properties:
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- clocks : Input clock specifier. Refer to common clock bindings.
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- interrupts : Interrupt mapping for GPIO IRQ.
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- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
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- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
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- xlnx,gpio-width : gpio width
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- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
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- xlnx,is-dual : if 1, controller also uses the second channel
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- xlnx,all-inputs-2 : as above but for the second channel
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- xlnx,dout-default-2 : as above but the second channel
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- xlnx,gpio2-width : as above but for the second channel
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- xlnx,tri-default-2 : as above but for the second channel
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Example:
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gpio: gpio@40000000 {
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#gpio-cells = <2>;
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compatible = "xlnx,xps-gpio-1.00.a";
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clocks = <&clkc25>;
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gpio-controller ;
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interrupt-parent = <µblaze_0_intc>;
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interrupts = < 6 2 >;
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reg = < 0x40000000 0x10000 >;
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xlnx,all-inputs = <0x0>;
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xlnx,all-inputs-2 = <0x0>;
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xlnx,dout-default = <0x0>;
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xlnx,dout-default-2 = <0x0>;
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xlnx,gpio-width = <0x2>;
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xlnx,gpio2-width = <0x2>;
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xlnx,interrupt-present = <0x1>;
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xlnx,is-dual = <0x1>;
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xlnx,tri-default = <0xffffffff>;
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xlnx,tri-default-2 = <0xffffffff>;
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} ;
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Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml
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Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Xilinx AXI GPIO controller
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maintainers:
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- Neeli Srinivas <srinivas.neeli@xilinx.com>
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description:
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The AXI GPIO design provides a general purpose input/output interface
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to an AXI4-Lite interface. The AXI GPIO can be configured as either
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a single or a dual-channel device. The width of each channel is
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independently configurable. The channels can be configured to
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generate an interrupt when a transition on any of their inputs occurs.
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properties:
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compatible:
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enum:
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- xlnx,xps-gpio-1.00.a
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reg:
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maxItems: 1
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"#gpio-cells":
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const: 2
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interrupts:
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maxItems: 1
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gpio-controller: true
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gpio-line-names:
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description: strings describing the names of each gpio line
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minItems: 1
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maxItems: 64
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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clocks:
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maxItems: 1
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interrupt-names: true
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xlnx,all-inputs:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This option sets this GPIO channel1 bits in input mode.
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xlnx,all-inputs-2:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This option sets this GPIO channel2 bits in input mode.
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xlnx,all-outputs:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This option sets this GPIO channel1 bits in output mode.
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xlnx,all-outputs-2:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This option sets this GPIO channel2 bits in output mode.
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xlnx,dout-default:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Sets the default value of all the enabled bits of
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channel1.
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default: 0
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xlnx,dout-default-2:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Sets the default value of all the enabled bits of
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channel2.
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default: 0
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xlnx,gpio-width:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: The value defines the bit width of the GPIO channel1.
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minimum: 1
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maximum: 32
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default: 32
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xlnx,gpio2-width:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: The value defines the bit width of the GPIO channel2.
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minimum: 1
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maximum: 32
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default: 32
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xlnx,interrupt-present:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This parameter enables interrupt control logic
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and interrupt registers in GPIO module.
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minimum: 0
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maximum: 1
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default: 0
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xlnx,is-dual:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This parameter enables a second GPIO channel (GPIO2).
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minimum: 0
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maximum: 1
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default: 0
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xlnx,tri-default:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This value configures the input or output mode
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of each bit of GPIO channel1.
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xlnx,tri-default-2:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: This value configures the input or output mode
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of each bit of GPIO channel2.
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required:
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- reg
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- compatible
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- gpio-controller
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- "#gpio-cells"
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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gpio@e000a000 {
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compatible = "xlnx,xps-gpio-1.00.a";
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reg = <0xa0020000 0x10000>;
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#gpio-cells = <2>;
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#interrupt-cells = <0x2>;
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clocks = <&zynqmp_clk 71>;
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gpio-controller;
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interrupt-controller;
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interrupt-names = "ip2intc_irpt";
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interrupt-parent = <&gic>;
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interrupts = <0 89 4>;
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xlnx,all-inputs = <0x0>;
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xlnx,all-inputs-2 = <0x0>;
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xlnx,all-outputs = <0x0>;
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xlnx,all-outputs-2 = <0x0>;
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xlnx,dout-default = <0x0>;
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xlnx,dout-default-2 = <0x0>;
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xlnx,gpio-width = <0x20>;
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xlnx,gpio2-width = <0x20>;
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xlnx,interrupt-present = <0x1>;
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xlnx,is-dual = <0x1>;
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xlnx,tri-default = <0xFFFFFFFF>;
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xlnx,tri-default-2 = <0xFFFFFFFF>;
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};
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...
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