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amdgpu/pm: Powerplay API for smu , changed 6 dpm reset functions to use API

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Modified Functions
  smu_set_xgmi_pstate()       - modifed arg0 to match Powerplay API set_xgmi_pstate
  smu_mode2_reset()           - modifed arg0 to match Powerplay API asic_reset_mode_2
  smu_switch_power_profile()  - modifed arg0 to match Powerplay API switch_power_profile
  smu_set_mp1_state()         - modifed arg0 to match Powerplay API set_mp1_state
  smu_set_df_cstate()         - modifed arg0 to match Powerplay API set_df_cstate
  smu_enable_mgpu_fan_boost() - modifed arg0 to match Powerplay API enable_mgpu_fan_boost

Other Changes
  added above smu reset Powerplay functions to swsmu_dpm_funcs
  removed special smu handling of above functions and called through Powerplay API

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Darren Powell 2020-10-29 18:19:35 -04:00 committed by Alex Deucher
parent 4df144f80d
commit bab0f60291
3 changed files with 41 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

46
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
View File

@ -1059,12 +1059,10 @@ int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev,
enum pp_mp1_state mp1_state)
{
int ret = 0;
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
if (is_support_sw_smu(adev)) {
ret = smu_set_mp1_state(&adev->smu, mp1_state);
} else if (adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->set_mp1_state) {
ret = adev->powerplay.pp_funcs->set_mp1_state(
if (pp_funcs && pp_funcs->set_mp1_state) {
ret = pp_funcs->set_mp1_state(
adev->powerplay.pp_handle,
mp1_state);
}
@ -1096,16 +1094,11 @@ int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev)
{
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
void *pp_handle = adev->powerplay.pp_handle;
struct smu_context *smu = &adev->smu;
if (is_support_sw_smu(adev)) {
return smu_mode2_reset(smu);
} else {
if (!pp_funcs || !pp_funcs->asic_reset_mode_2)
return -ENOENT;
if (!pp_funcs || !pp_funcs->asic_reset_mode_2)
return -ENOENT;
return pp_funcs->asic_reset_mode_2(pp_handle);
}
return pp_funcs->asic_reset_mode_2(pp_handle);
}
int amdgpu_dpm_baco_reset(struct amdgpu_device *adev)
@ -1166,16 +1159,14 @@ int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,
enum PP_SMC_POWER_PROFILE type,
bool en)
{
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
int ret = 0;
if (amdgpu_sriov_vf(adev))
return 0;
if (is_support_sw_smu(adev))
ret = smu_switch_power_profile(&adev->smu, type, en);
else if (adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->switch_power_profile)
ret = adev->powerplay.pp_funcs->switch_power_profile(
if (pp_funcs && pp_funcs->switch_power_profile)
ret = pp_funcs->switch_power_profile(
adev->powerplay.pp_handle, type, en);
return ret;
@ -1184,13 +1175,11 @@ int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,
int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,
uint32_t pstate)
{
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
int ret = 0;
if (is_support_sw_smu(adev))
ret = smu_set_xgmi_pstate(&adev->smu, pstate);
else if (adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->set_xgmi_pstate)
ret = adev->powerplay.pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle,
if (pp_funcs && pp_funcs->set_xgmi_pstate)
ret = pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle,
pstate);
return ret;
@ -1202,12 +1191,8 @@ int amdgpu_dpm_set_df_cstate(struct amdgpu_device *adev,
int ret = 0;
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
void *pp_handle = adev->powerplay.pp_handle;
struct smu_context *smu = &adev->smu;
if (is_support_sw_smu(adev))
ret = smu_set_df_cstate(smu, cstate);
else if (pp_funcs &&
pp_funcs->set_df_cstate)
if (pp_funcs && pp_funcs->set_df_cstate)
ret = pp_funcs->set_df_cstate(pp_handle, cstate);
return ret;
@ -1228,12 +1213,9 @@ int amdgpu_dpm_enable_mgpu_fan_boost(struct amdgpu_device *adev)
void *pp_handle = adev->powerplay.pp_handle;
const struct amd_pm_funcs *pp_funcs =
adev->powerplay.pp_funcs;
struct smu_context *smu = &adev->smu;
int ret = 0;
if (is_support_sw_smu(adev))
ret = smu_enable_mgpu_fan_boost(smu);
else if (pp_funcs && pp_funcs->enable_mgpu_fan_boost)
if (pp_funcs && pp_funcs->enable_mgpu_fan_boost)
ret = pp_funcs->enable_mgpu_fan_boost(pp_handle);
return ret;

12
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
View File

@ -1268,7 +1268,7 @@ int smu_display_clock_voltage_request(struct smu_context *smu,
struct pp_display_clock_request *clock_req);
int smu_display_disable_memory_clock_switch(struct smu_context *smu, bool disable_memory_clock_switch);
int smu_set_xgmi_pstate(struct smu_context *smu,
int smu_set_xgmi_pstate(void *handle,
uint32_t pstate);
int smu_set_azalia_d3_pme(struct smu_context *smu);
@ -1282,7 +1282,7 @@ int smu_baco_exit(struct smu_context *smu);
bool smu_mode1_reset_is_support(struct smu_context *smu);
int smu_mode1_reset(struct smu_context *smu);
int smu_mode2_reset(struct smu_context *smu);
int smu_mode2_reset(void *handle);
extern const struct amd_ip_funcs smu_ip_funcs;
@ -1310,7 +1310,7 @@ extern int smu_handle_task(struct smu_context *smu,
enum amd_dpm_forced_level level,
enum amd_pp_task task_id,
bool lock_needed);
int smu_switch_power_profile(struct smu_context *smu,
int smu_switch_power_profile(void *handle,
enum PP_SMC_POWER_PROFILE type,
bool en);
int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
@ -1326,9 +1326,9 @@ int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask);
int smu_force_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type,
uint32_t mask);
int smu_set_mp1_state(struct smu_context *smu,
int smu_set_mp1_state(void *handle,
enum pp_mp1_state mp1_state);
int smu_set_df_cstate(struct smu_context *smu,
int smu_set_df_cstate(void *handle,
enum pp_df_cstate state);
int smu_allow_xgmi_power_down(struct smu_context *smu, bool en);
@ -1346,7 +1346,7 @@ int smu_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value);
ssize_t smu_sys_get_gpu_metrics(struct smu_context *smu, void **table);
int smu_enable_mgpu_fan_boost(struct smu_context *smu);
int smu_enable_mgpu_fan_boost(void *handle);
int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state);
#endif

27
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
View File

@ -1660,10 +1660,11 @@ out:
return ret;
}
int smu_switch_power_profile(struct smu_context *smu,
int smu_switch_power_profile(void *handle,
enum PP_SMC_POWER_PROFILE type,
bool en)
{
struct smu_context *smu = handle;
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
long workload;
uint32_t index;
@ -1800,9 +1801,10 @@ int smu_force_clk_levels(struct smu_context *smu,
* However, the mp1 state setting should still be granted
* even if the dpm_enabled cleared.
*/
int smu_set_mp1_state(struct smu_context *smu,
int smu_set_mp1_state(void *handle,
enum pp_mp1_state mp1_state)
{
struct smu_context *smu = handle;
uint16_t msg;
int ret;
@ -1839,9 +1841,10 @@ int smu_set_mp1_state(struct smu_context *smu,
return ret;
}
int smu_set_df_cstate(struct smu_context *smu,
int smu_set_df_cstate(void *handle,
enum pp_df_cstate state)
{
struct smu_context *smu = handle;
int ret = 0;
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
@ -2440,9 +2443,10 @@ int smu_display_disable_memory_clock_switch(struct smu_context *smu, bool disabl
return ret;
}
int smu_set_xgmi_pstate(struct smu_context *smu,
int smu_set_xgmi_pstate(void *handle,
uint32_t pstate)
{
struct smu_context *smu = handle;
int ret = 0;
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
@ -2589,8 +2593,9 @@ int smu_mode1_reset(struct smu_context *smu)
return ret;
}
int smu_mode2_reset(struct smu_context *smu)
int smu_mode2_reset(void *handle)
{
struct smu_context *smu = handle;
int ret = 0;
if (!smu->pm_enabled)
@ -2701,8 +2706,9 @@ ssize_t smu_sys_get_gpu_metrics(struct smu_context *smu,
return size;
}
int smu_enable_mgpu_fan_boost(struct smu_context *smu)
int smu_enable_mgpu_fan_boost(void *handle)
{
struct smu_context *smu = handle;
int ret = 0;
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
@ -2731,5 +2737,14 @@ int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state)
}
static const struct amd_pm_funcs swsmu_pm_funcs = {
/* export for sysfs */
.get_performance_level = smu_get_performance_level,
.switch_power_profile = smu_switch_power_profile,
/* export to amdgpu */
.set_mp1_state = smu_set_mp1_state,
/* export to DC */
.enable_mgpu_fan_boost = smu_enable_mgpu_fan_boost,
.asic_reset_mode_2 = smu_mode2_reset,
.set_df_cstate = smu_set_df_cstate,
.set_xgmi_pstate = smu_set_xgmi_pstate,
};