Merge branch 'pci/resource'
- Replace sparc pci_mmap_page_range() wrapper. This still leaves a sparc-specific pci_mmap_resource_range(), but it's only one interface instead of two (Arnd Bergmann) - Remove sparc-specific pci_mmap_resource_range() by implementing pci_iobar_pfn(). This removes the ability to map the entire PCI I/O space using /proc/bus/pci, but we believe that's already been broken since v2.6.28 (Arnd Bergmann) * pci/resource: sparc: Use generic pci_mmap_resource_range() PCI: Remove pci_mmap_page_range() wrapper
This commit is contained in:
Bjorn Helgaas
commit
bac0f4474c
@ -125,7 +125,7 @@ implementation of that functionality. To support the historical interface of
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mmap() through files in /proc/bus/pci, platforms may also set HAVE_PCI_MMAP.
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Alternatively, platforms which set HAVE_PCI_MMAP may provide their own
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implementation of pci_mmap_page_range() instead of defining
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implementation of pci_mmap_resource_range() instead of defining
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ARCH_GENERIC_PCI_MMAP_RESOURCE.
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Platforms which support write-combining maps of PCI resources must define
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@ -37,6 +37,7 @@ static inline int pci_proc_domain(struct pci_bus *bus)
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#define HAVE_PCI_MMAP
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#define arch_can_pci_mmap_io() 1
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#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
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#define ARCH_GENERIC_PCI_MMAP_RESOURCE
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#define get_pci_unmapped_area get_fb_unmapped_area
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#endif /* CONFIG_SPARC64 */
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@ -751,156 +751,15 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
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}
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/* Platform support for /proc/bus/pci/X/Y mmap()s. */
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/* If the user uses a host-bridge as the PCI device, he may use
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* this to perform a raw mmap() of the I/O or MEM space behind
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* that controller.
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*
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* This can be useful for execution of x86 PCI bios initialization code
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* on a PCI card, like the xfree86 int10 stuff does.
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*/
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static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state)
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int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma)
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{
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struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
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unsigned long space_size, user_offset, user_size;
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resource_size_t ioaddr = pci_resource_start(pdev, bar);
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if (mmap_state == pci_mmap_io) {
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space_size = resource_size(&pbm->io_space);
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} else {
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space_size = resource_size(&pbm->mem_space);
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}
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/* Make sure the request is in range. */
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user_offset = vma->vm_pgoff << PAGE_SHIFT;
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user_size = vma->vm_end - vma->vm_start;
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if (user_offset >= space_size ||
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(user_offset + user_size) > space_size)
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if (!pbm)
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return -EINVAL;
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if (mmap_state == pci_mmap_io) {
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vma->vm_pgoff = (pbm->io_space.start +
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user_offset) >> PAGE_SHIFT;
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} else {
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vma->vm_pgoff = (pbm->mem_space.start +
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user_offset) >> PAGE_SHIFT;
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}
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return 0;
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}
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/* Adjust vm_pgoff of VMA such that it is the physical page offset
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* corresponding to the 32-bit pci bus offset for DEV requested by the user.
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*
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* Basically, the user finds the base address for his device which he wishes
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* to mmap. They read the 32-bit value from the config space base register,
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* add whatever PAGE_SIZE multiple offset they wish, and feed this into the
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* offset parameter of mmap on /proc/bus/pci/XXX for that device.
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*
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* Returns negative error code on failure, zero on success.
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*/
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static int __pci_mmap_make_offset(struct pci_dev *pdev,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state)
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{
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unsigned long user_paddr, user_size;
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int i, err;
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/* First compute the physical address in vma->vm_pgoff,
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* making sure the user offset is within range in the
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* appropriate PCI space.
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*/
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err = __pci_mmap_make_offset_bus(pdev, vma, mmap_state);
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if (err)
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return err;
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/* If this is a mapping on a host bridge, any address
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* is OK.
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*/
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if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
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return err;
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/* Otherwise make sure it's in the range for one of the
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* device's resources.
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*/
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user_paddr = vma->vm_pgoff << PAGE_SHIFT;
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user_size = vma->vm_end - vma->vm_start;
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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struct resource *rp = &pdev->resource[i];
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resource_size_t aligned_end;
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/* Active? */
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if (!rp->flags)
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continue;
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/* Same type? */
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if (i == PCI_ROM_RESOURCE) {
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if (mmap_state != pci_mmap_mem)
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continue;
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} else {
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if ((mmap_state == pci_mmap_io &&
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(rp->flags & IORESOURCE_IO) == 0) ||
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(mmap_state == pci_mmap_mem &&
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(rp->flags & IORESOURCE_MEM) == 0))
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continue;
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}
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/* Align the resource end to the next page address.
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* PAGE_SIZE intentionally added instead of (PAGE_SIZE - 1),
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* because actually we need the address of the next byte
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* after rp->end.
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*/
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aligned_end = (rp->end + PAGE_SIZE) & PAGE_MASK;
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if ((rp->start <= user_paddr) &&
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(user_paddr + user_size) <= aligned_end)
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break;
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}
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if (i > PCI_ROM_RESOURCE)
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return -EINVAL;
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return 0;
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}
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/* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
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* device mapping.
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*/
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static void __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state)
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{
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/* Our io_remap_pfn_range takes care of this, do nothing. */
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}
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/* Perform the actual remap of the pages for a PCI device mapping, as appropriate
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* for this architecture. The region in the process to map is described by vm_start
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* and vm_end members of VMA, the base physical address is found in vm_pgoff.
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* The pci device structure is provided so that architectures may make mapping
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* decisions on a per-device or per-bus basis.
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*
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* Returns a negative error code on failure, zero on success.
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*/
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int pci_mmap_page_range(struct pci_dev *dev, int bar,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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int ret;
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ret = __pci_mmap_make_offset(dev, vma, mmap_state);
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if (ret < 0)
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return ret;
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__pci_mmap_set_pgprot(dev, vma, mmap_state);
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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ret = io_remap_pfn_range(vma, vma->vm_start,
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vma->vm_pgoff,
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vma->vm_end - vma->vm_start,
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vma->vm_page_prot);
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if (ret)
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return ret;
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vma->vm_pgoff += (ioaddr + pbm->io_space.start) >> PAGE_SHIFT;
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return 0;
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}
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@ -13,27 +13,6 @@
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#ifdef ARCH_GENERIC_PCI_MMAP_RESOURCE
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/*
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* Modern setup: generic pci_mmap_resource_range(), and implement the legacy
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* pci_mmap_page_range() (if needed) as a wrapper round it.
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*/
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#ifdef HAVE_PCI_MMAP
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int pci_mmap_page_range(struct pci_dev *pdev, int bar,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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resource_size_t start, end;
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pci_resource_to_user(pdev, bar, &pdev->resource[bar], &start, &end);
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/* Adjust vm_pgoff to be the offset within the resource */
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vma->vm_pgoff -= start >> PAGE_SHIFT;
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return pci_mmap_resource_range(pdev, bar, vma, mmap_state,
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write_combine);
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}
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#endif
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static const struct vm_operations_struct pci_phys_vm_ops = {
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#ifdef CONFIG_HAVE_IOREMAP_PROT
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.access = generic_access_phys,
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@ -70,27 +49,4 @@ int pci_mmap_resource_range(struct pci_dev *pdev, int bar,
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vma->vm_page_prot);
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}
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#elif defined(HAVE_PCI_MMAP) /* && !ARCH_GENERIC_PCI_MMAP_RESOURCE */
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/*
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* Legacy setup: Implement pci_mmap_resource_range() as a wrapper around
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* the architecture's pci_mmap_page_range(), converting to "user visible"
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* addresses as necessary.
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*/
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int pci_mmap_resource_range(struct pci_dev *pdev, int bar,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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resource_size_t start, end;
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/*
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* pci_mmap_page_range() expects the same kind of entry as coming
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* from /proc/bus/pci/ which is a "user visible" value. If this is
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* different from the resource itself, arch will do necessary fixup.
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*/
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pci_resource_to_user(pdev, bar, &pdev->resource[bar], &start, &end);
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vma->vm_pgoff += start >> PAGE_SHIFT;
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return pci_mmap_page_range(pdev, bar, vma, mmap_state, write_combine);
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}
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#endif
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@ -244,6 +244,7 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
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{
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struct pci_dev *dev = pde_data(file_inode(file));
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struct pci_filp_private *fpriv = file->private_data;
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resource_size_t start, end;
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int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
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if (!capable(CAP_SYS_RAWIO) ||
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@ -278,7 +279,11 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
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iomem_is_exclusive(dev->resource[i].start))
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return -EINVAL;
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ret = pci_mmap_page_range(dev, i, vma,
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pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
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/* Adjust vm_pgoff to be the offset within the resource */
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vma->vm_pgoff -= start >> PAGE_SHIFT;
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ret = pci_mmap_resource_range(dev, i, vma,
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fpriv->mmap_state, write_combine);
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if (ret < 0)
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return ret;
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@ -1909,24 +1909,14 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
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#include <asm/pci.h>
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/* These two functions provide almost identical functionality. Depending
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* on the architecture, one will be implemented as a wrapper around the
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* other (in drivers/pci/mmap.c).
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*
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/*
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* pci_mmap_resource_range() maps a specific BAR, and vm->vm_pgoff
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* is expected to be an offset within that region.
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*
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* pci_mmap_page_range() is the legacy architecture-specific interface,
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* which accepts a "user visible" resource address converted by
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* pci_resource_to_user(), as used in the legacy mmap() interface in
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* /proc/bus/pci/.
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*/
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int pci_mmap_resource_range(struct pci_dev *dev, int bar,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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int pci_mmap_page_range(struct pci_dev *pdev, int bar,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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#ifndef arch_can_pci_mmap_wc
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#define arch_can_pci_mmap_wc() 0
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