mips: Add N64 machine type
Add support for the Nintendo 64. Signed-off-by: Lauri Kasanen <cand@gmx.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -18,6 +18,7 @@ platform-$(CONFIG_MACH_LOONGSON2EF) += loongson2ef/
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platform-$(CONFIG_MACH_LOONGSON32) += loongson32/
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platform-$(CONFIG_MACH_LOONGSON64) += loongson64/
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platform-$(CONFIG_MIPS_MALTA) += mti-malta/
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platform-$(CONFIG_MACH_NINTENDO64) += n64/
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platform-$(CONFIG_NLM_COMMON) += netlogic/
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platform-$(CONFIG_PIC32MZDA) += pic32/
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platform-$(CONFIG_MACH_PISTACHIO) += pistachio/
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@ -607,6 +607,18 @@ config MACH_VR41XX
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select SYS_SUPPORTS_MIPS16
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select GPIOLIB
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config MACH_NINTENDO64
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bool "Nintendo 64 console"
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select CEVT_R4K
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select CSRC_R4K
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select SYS_HAS_CPU_R4300
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_SUPPORTS_ZBOOT
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_64BIT_KERNEL
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select DMA_NONCOHERENT
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select IRQ_MIPS_CPU
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config RALINK
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bool "Ralink based machines"
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select CEVT_R4K
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9
arch/mips/include/asm/mach-n64/irq.h
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arch/mips/include/asm/mach-n64/irq.h
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@ -0,0 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_MACH_N64_IRQ_H
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#define __ASM_MACH_N64_IRQ_H
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#define NR_IRQS 8
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#include <asm/mach-generic/irq.h>
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#endif /* __ASM_MACH_N64_IRQ_H */
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8
arch/mips/include/asm/mach-n64/kmalloc.h
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arch/mips/include/asm/mach-n64/kmalloc.h
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_MACH_N64_KMALLOC_H
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#define __ASM_MACH_N64_KMALLOC_H
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/* The default of 128 bytes wastes too much, use 32 (the largest cacheline, I) */
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#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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#endif /* __ASM_MACH_N64_KMALLOC_H */
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6
arch/mips/n64/Makefile
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6
arch/mips/n64/Makefile
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@ -0,0 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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#
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# Nintendo 64
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#
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obj-y := init.o irq.o
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7
arch/mips/n64/Platform
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7
arch/mips/n64/Platform
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@ -0,0 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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#
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# Nintendo 64
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#
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cflags-$(CONFIG_MACH_NINTENDO64) += -I$(srctree)/arch/mips/include/asm/mach-n64
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load-$(CONFIG_MACH_NINTENDO64) += 0xffffffff80101000
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164
arch/mips/n64/init.c
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164
arch/mips/n64/init.c
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@ -0,0 +1,164 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Nintendo 64 init.
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*
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* Copyright (C) 2021 Lauri Kasanen
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*/
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/memblock.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/simplefb.h>
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#include <linux/string.h>
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#include <asm/bootinfo.h>
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#include <asm/fw/fw.h>
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#include <asm/time.h>
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#define IO_MEM_RESOURCE_START 0UL
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#define IO_MEM_RESOURCE_END 0x1fffffffUL
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/*
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* System-specifc irq names for clarity
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*/
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#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
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#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
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#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
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#define RCP_IRQ MIPS_CPU_IRQ(2)
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#define CART_IRQ MIPS_CPU_IRQ(3)
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#define PRENMI_IRQ MIPS_CPU_IRQ(4)
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#define RDBR_IRQ MIPS_CPU_IRQ(5)
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#define RDBW_IRQ MIPS_CPU_IRQ(6)
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#define TIMER_IRQ MIPS_CPU_IRQ(7)
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static void __init iomem_resource_init(void)
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{
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iomem_resource.start = IO_MEM_RESOURCE_START;
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iomem_resource.end = IO_MEM_RESOURCE_END;
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}
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const char *get_system_type(void)
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{
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return "Nintendo 64";
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}
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void __init prom_init(void)
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{
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fw_init_cmdline();
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}
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#define W 320
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#define H 240
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#define REG_BASE ((u32 *) CKSEG1ADDR(0x4400000))
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static void __init n64rdp_write_reg(const u8 reg, const u32 value)
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{
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__raw_writel(value, REG_BASE + reg);
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}
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#undef REG_BASE
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static const u32 ntsc_320[] __initconst = {
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0x00013212, 0x00000000, 0x00000140, 0x00000200,
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0x00000000, 0x03e52239, 0x0000020d, 0x00000c15,
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0x0c150c15, 0x006c02ec, 0x002501ff, 0x000e0204,
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0x00000200, 0x00000400
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};
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#define MI_REG_BASE 0x4300000
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#define NUM_MI_REGS 4
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#define AI_REG_BASE 0x4500000
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#define NUM_AI_REGS 6
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#define PI_REG_BASE 0x4600000
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#define NUM_PI_REGS 5
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#define SI_REG_BASE 0x4800000
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#define NUM_SI_REGS 7
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static int __init n64_platform_init(void)
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{
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static const char simplefb_resname[] = "FB";
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static const struct simplefb_platform_data mode = {
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.width = W,
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.height = H,
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.stride = W * 2,
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.format = "r5g5b5a1"
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};
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struct resource res[3];
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void *orig;
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unsigned long phys;
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unsigned i;
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memset(res, 0, sizeof(struct resource) * 3);
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res[0].flags = IORESOURCE_MEM;
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res[0].start = MI_REG_BASE;
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res[0].end = MI_REG_BASE + NUM_MI_REGS * 4 - 1;
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res[1].flags = IORESOURCE_MEM;
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res[1].start = AI_REG_BASE;
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res[1].end = AI_REG_BASE + NUM_AI_REGS * 4 - 1;
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res[2].flags = IORESOURCE_IRQ;
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res[2].start = RCP_IRQ;
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res[2].end = RCP_IRQ;
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platform_device_register_simple("n64audio", -1, res, 3);
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memset(&res[0], 0, sizeof(res[0]));
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res[0].flags = IORESOURCE_MEM;
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res[0].start = PI_REG_BASE;
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res[0].end = PI_REG_BASE + NUM_PI_REGS * 4 - 1;
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platform_device_register_simple("n64cart", -1, res, 1);
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memset(&res[0], 0, sizeof(res[0]));
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res[0].flags = IORESOURCE_MEM;
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res[0].start = SI_REG_BASE;
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res[0].end = SI_REG_BASE + NUM_SI_REGS * 4 - 1;
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platform_device_register_simple("n64joy", -1, res, 1);
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/* The framebuffer needs 64-byte alignment */
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orig = kzalloc(W * H * 2 + 63, GFP_DMA | GFP_KERNEL);
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if (!orig)
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return -ENOMEM;
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phys = virt_to_phys(orig);
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phys += 63;
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phys &= ~63;
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for (i = 0; i < ARRAY_SIZE(ntsc_320); i++) {
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if (i == 1)
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n64rdp_write_reg(i, phys);
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else
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n64rdp_write_reg(i, ntsc_320[i]);
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}
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/* setup IORESOURCE_MEM as framebuffer memory */
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memset(&res[0], 0, sizeof(res[0]));
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res[0].flags = IORESOURCE_MEM;
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res[0].name = simplefb_resname;
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res[0].start = phys;
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res[0].end = phys + W * H * 2 - 1;
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platform_device_register_resndata(NULL, "simple-framebuffer", 0,
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&res[0], 1, &mode, sizeof(mode));
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return 0;
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}
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#undef W
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#undef H
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arch_initcall(n64_platform_init);
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void __init plat_mem_setup(void)
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{
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iomem_resource_init();
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memblock_add(0x0, 8 * 1024 * 1024); /* Bootloader blocks the 4mb config */
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}
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void __init plat_time_init(void)
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{
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/* 93.75 MHz cpu, count register runs at half rate */
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mips_hpt_frequency = 93750000 / 2;
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}
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16
arch/mips/n64/irq.c
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arch/mips/n64/irq.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* N64 IRQ
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*
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* Copyright (C) 2021 Lauri Kasanen
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*/
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#include <linux/export.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq_cpu.h>
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void __init arch_init_irq(void)
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{
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mips_cpu_irq_init();
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}
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