ARCv2: SMP: Emulate IPI to self using software triggered interrupt
ARConnect/MCIP Inter-Core-Interrupt module can't send interrupt to local core. So use core intc capability to trigger software interrupt to self, using an unsued IRQ #21. This showed up as csd deadlock with LTP trace_sched on a dual core system. This test acts as scheduler fuzzer, triggering all sorts of schedulting activity. Trouble starts with IPI to self, which doesn't get delivered (effectively lost due to H/w capability), but the msg intended to be sent remain enqueued in per-cpu @ipi_data. All subsequent IPIs to this core from other cores get elided due to the IPI coalescing optimization in ipi_send_msg_one() where a pending msg implies an IPI already sent and assumes other core is yet to ack it. After the elided IPI, other core simply goes into csd_lock_wait() but never comes out as this core never sees the interrupt. Fixes STAR 9001008624 Cc: Peter Zijlstra <peterz@infradead.org> Cc: <stable@vger.kernel.org> [4.2] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -22,6 +22,7 @@
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#define AUX_IRQ_CTRL 0x00E
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#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
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#define AUX_IRQ_LVL_PEND 0x200 /* Pending Intr across all levels */
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#define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */
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#define AUX_IRQ_PRIORITY 0x206
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#define ICAUSE 0x40a
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#define AUX_IRQ_SELECT 0x40b
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@ -115,6 +116,16 @@ static inline int arch_irqs_disabled(void)
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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static inline void arc_softirq_trigger(int irq)
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{
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write_aux_reg(AUX_IRQ_HINT, irq);
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}
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static inline void arc_softirq_clear(int irq)
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{
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write_aux_reg(AUX_IRQ_HINT, 0);
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}
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#else
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.macro IRQ_DISABLE scratch
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@ -45,11 +45,12 @@ VECTOR reserved ; Reserved slots
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VECTOR handle_interrupt ; (16) Timer0
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VECTOR handle_interrupt ; unused (Timer1)
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VECTOR handle_interrupt ; unused (WDT)
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VECTOR handle_interrupt ; (19) ICI (inter core interrupt)
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VECTOR handle_interrupt
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VECTOR handle_interrupt
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VECTOR handle_interrupt
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VECTOR handle_interrupt ; (23) End of fixed IRQs
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VECTOR handle_interrupt ; (19) Inter core Interrupt (IPI)
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VECTOR handle_interrupt ; (20) perf Interrupt
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VECTOR handle_interrupt ; (21) Software Triggered Intr (Self IPI)
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VECTOR handle_interrupt ; unused
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VECTOR handle_interrupt ; (23) unused
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# End of fixed IRQs
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.rept CONFIG_ARC_NUMBER_OF_INTERRUPTS - 8
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VECTOR handle_interrupt
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@ -11,9 +11,12 @@
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#include <linux/smp.h>
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#include <linux/irq.h>
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#include <linux/spinlock.h>
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#include <asm/irqflags-arcv2.h>
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#include <asm/mcip.h>
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#include <asm/setup.h>
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#define SOFTIRQ_IRQ 21
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static char smp_cpuinfo_buf[128];
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static int idu_detected;
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@ -22,6 +25,7 @@ static DEFINE_RAW_SPINLOCK(mcip_lock);
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static void mcip_setup_per_cpu(int cpu)
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{
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smp_ipi_irq_setup(cpu, IPI_IRQ);
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smp_ipi_irq_setup(cpu, SOFTIRQ_IRQ);
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}
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static void mcip_ipi_send(int cpu)
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@ -29,6 +33,12 @@ static void mcip_ipi_send(int cpu)
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unsigned long flags;
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int ipi_was_pending;
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/* ARConnect can only send IPI to others */
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if (unlikely(cpu == raw_smp_processor_id())) {
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arc_softirq_trigger(SOFTIRQ_IRQ);
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return;
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}
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/*
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* NOTE: We must spin here if the other cpu hasn't yet
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* serviced a previous message. This can burn lots
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@ -63,6 +73,11 @@ static void mcip_ipi_clear(int irq)
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unsigned long flags;
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unsigned int __maybe_unused copy;
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if (unlikely(irq == SOFTIRQ_IRQ)) {
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arc_softirq_clear(irq);
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return;
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}
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raw_spin_lock_irqsave(&mcip_lock, flags);
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/* Who sent the IPI */
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