mtd: spi-nor: move #define SPINOR_OP_WRDI
The write disable (WRDI) opcode is not really specific to the SST flashes (anymore?) -- move the #define to the main opcode group, just before WREN. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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@ -20,6 +20,7 @@
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*/
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/* Flash opcodes. */
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#define SPINOR_OP_WRDI 0x04 /* Write disable */
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#define SPINOR_OP_WREN 0x06 /* Write enable */
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#define SPINOR_OP_RDSR 0x05 /* Read status register */
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#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
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@ -80,7 +81,6 @@
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/* Used for SST flashes only. */
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#define SPINOR_OP_BP 0x02 /* Byte program */
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#define SPINOR_OP_WRDI 0x04 /* Write disable */
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#define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */
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/* Used for S3AN flashes only */
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