[PATCH] UHCI: unify BIOS handoff and driver reset code
This patch (as574) updates the PCI BIOS usb-handoff code for UHCI controllers, making it work like the reset routines in uhci-hcd. This allows uhci-hcd to drop its own routines in favor of the new ones (code-sharing). Once the patch is merged we can turn the usb-handoff option on permanently, as far as UHCI is concerned. OHCI and EHCI may still have some issues. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -9,6 +9,12 @@
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*/
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#include <linux/config.h>
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#ifdef CONFIG_USB_DEBUG
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#define DEBUG
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#else
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#undef DEBUG
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#endif
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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@ -46,13 +52,14 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_2, qui
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#define UHCI_USBLEGSUP 0xc0 /* legacy support */
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#define UHCI_USBCMD 0 /* command register */
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#define UHCI_USBSTS 2 /* status register */
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#define UHCI_USBINTR 4 /* interrupt register */
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#define UHCI_USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
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#define UHCI_USBCMD_RUN (1 << 0) /* RUN/STOP bit */
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#define UHCI_USBCMD_GRESET (1 << 2) /* Global reset */
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#define UHCI_USBCMD_CONFIGURE (1 << 6) /* config semaphore */
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#define UHCI_USBSTS_HALTED (1 << 5) /* HCHalted bit */
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#define UHCI_USBLEGSUP_RWC 0x8f00 /* the R/WC bits */
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#define UHCI_USBLEGSUP_RO 0x5040 /* R/O and reserved bits */
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#define UHCI_USBCMD_RUN 0x0001 /* RUN/STOP bit */
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#define UHCI_USBCMD_HCRESET 0x0002 /* Host Controller reset */
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#define UHCI_USBCMD_EGSM 0x0008 /* Global Suspend Mode */
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#define UHCI_USBCMD_CONFIGURE 0x0040 /* Config Flag */
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#define UHCI_USBINTR_RESUME 0x0002 /* Resume interrupt enable */
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#define OHCI_CONTROL 0x04
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#define OHCI_CMDSTATUS 0x08
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@ -84,11 +91,90 @@ static int __init usb_handoff_early(char *str)
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}
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__setup("usb-handoff", usb_handoff_early);
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/*
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* Make sure the controller is completely inactive, unable to
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* generate interrupts or do DMA.
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*/
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void uhci_reset_hc(struct pci_dev *pdev, unsigned long base)
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{
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/* Turn off PIRQ enable and SMI enable. (This also turns off the
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* BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
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*/
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pci_write_config_word(pdev, UHCI_USBLEGSUP, UHCI_USBLEGSUP_RWC);
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/* Reset the HC - this will force us to get a
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* new notification of any already connected
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* ports due to the virtual disconnect that it
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* implies.
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*/
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outw(UHCI_USBCMD_HCRESET, base + UHCI_USBCMD);
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mb();
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udelay(5);
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if (inw(base + UHCI_USBCMD) & UHCI_USBCMD_HCRESET)
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dev_warn(&pdev->dev, "HCRESET not completed yet!\n");
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/* Just to be safe, disable interrupt requests and
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* make sure the controller is stopped.
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*/
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outw(0, base + UHCI_USBINTR);
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outw(0, base + UHCI_USBCMD);
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}
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EXPORT_SYMBOL_GPL(uhci_reset_hc);
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/*
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* Initialize a controller that was newly discovered or has just been
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* resumed. In either case we can't be sure of its previous state.
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*
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* Returns: 1 if the controller was reset, 0 otherwise.
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*/
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int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base)
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{
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u16 legsup;
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unsigned int cmd, intr;
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/*
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* When restarting a suspended controller, we expect all the
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* settings to be the same as we left them:
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*
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* PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
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* Controller is stopped and configured with EGSM set;
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* No interrupts enabled except possibly Resume Detect.
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*
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* If any of these conditions are violated we do a complete reset.
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*/
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pci_read_config_word(pdev, UHCI_USBLEGSUP, &legsup);
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if (legsup & ~(UHCI_USBLEGSUP_RO | UHCI_USBLEGSUP_RWC)) {
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dev_dbg(&pdev->dev, "%s: legsup = 0x%04x\n",
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__FUNCTION__, legsup);
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goto reset_needed;
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}
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cmd = inw(base + UHCI_USBCMD);
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if ((cmd & UHCI_USBCMD_RUN) || !(cmd & UHCI_USBCMD_CONFIGURE) ||
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!(cmd & UHCI_USBCMD_EGSM)) {
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dev_dbg(&pdev->dev, "%s: cmd = 0x%04x\n",
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__FUNCTION__, cmd);
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goto reset_needed;
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}
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intr = inw(base + UHCI_USBINTR);
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if (intr & (~UHCI_USBINTR_RESUME)) {
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dev_dbg(&pdev->dev, "%s: intr = 0x%04x\n",
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__FUNCTION__, intr);
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goto reset_needed;
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}
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return 0;
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reset_needed:
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dev_dbg(&pdev->dev, "Performing full reset\n");
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uhci_reset_hc(pdev, base);
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return 1;
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}
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EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc);
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static void __devinit quirk_usb_handoff_uhci(struct pci_dev *pdev)
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{
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unsigned long base = 0;
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int wait_time, delta;
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u16 val, sts;
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int i;
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for (i = 0; i < PCI_ROM_RESOURCE; i++)
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@ -97,44 +183,8 @@ static void __devinit quirk_usb_handoff_uhci(struct pci_dev *pdev)
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break;
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}
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if (!base)
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return;
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/*
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* stop controller
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*/
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sts = inw(base + UHCI_USBSTS);
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val = inw(base + UHCI_USBCMD);
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val &= ~(u16)(UHCI_USBCMD_RUN | UHCI_USBCMD_CONFIGURE);
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outw(val, base + UHCI_USBCMD);
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/*
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* wait while it stops if it was running
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*/
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if ((sts & UHCI_USBSTS_HALTED) == 0)
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{
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wait_time = 1000;
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delta = 100;
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do {
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outw(0x1f, base + UHCI_USBSTS);
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udelay(delta);
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wait_time -= delta;
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val = inw(base + UHCI_USBSTS);
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if (val & UHCI_USBSTS_HALTED)
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break;
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} while (wait_time > 0);
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}
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/*
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* disable interrupts & legacy support
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*/
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outw(0, base + UHCI_USBINTR);
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outw(0x1f, base + UHCI_USBSTS);
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pci_read_config_word(pdev, UHCI_USBLEGSUP, &val);
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if (val & 0xbf)
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pci_write_config_word(pdev, UHCI_USBLEGSUP, UHCI_USBLEGSUP_DEFAULT);
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if (base)
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uhci_check_and_reset_hc(pdev, base);
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}
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static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev)
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@ -101,37 +101,16 @@ static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
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#include "uhci-q.c"
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#include "uhci-hub.c"
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extern void uhci_reset_hc(struct pci_dev *pdev, unsigned long base);
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extern int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base);
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/*
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* Make sure the controller is completely inactive, unable to
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* generate interrupts or do DMA.
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* Finish up a host controller reset and update the recorded state.
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*/
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static void reset_hc(struct uhci_hcd *uhci)
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static void finish_reset(struct uhci_hcd *uhci)
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{
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int port;
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/* Turn off PIRQ enable and SMI enable. (This also turns off the
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* BIOS's USB Legacy Support.) Turn off all the R/WC bits too.
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*/
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pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
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USBLEGSUP_RWC);
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/* Reset the HC - this will force us to get a
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* new notification of any already connected
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* ports due to the virtual disconnect that it
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* implies.
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*/
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outw(USBCMD_HCRESET, uhci->io_addr + USBCMD);
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mb();
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udelay(5);
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if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET)
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dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
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/* Just to be safe, disable interrupt requests and
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* make sure the controller is stopped.
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*/
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outw(0, uhci->io_addr + USBINTR);
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outw(0, uhci->io_addr + USBCMD);
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/* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
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* bits in the port status and control registers.
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* We have to clear them by hand.
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@ -153,7 +132,8 @@ static void reset_hc(struct uhci_hcd *uhci)
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*/
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static void hc_died(struct uhci_hcd *uhci)
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{
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reset_hc(uhci);
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uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
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finish_reset(uhci);
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uhci->hc_inaccessible = 1;
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}
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@ -163,44 +143,8 @@ static void hc_died(struct uhci_hcd *uhci)
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*/
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static void check_and_reset_hc(struct uhci_hcd *uhci)
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{
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u16 legsup;
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unsigned int cmd, intr;
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/*
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* When restarting a suspended controller, we expect all the
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* settings to be the same as we left them:
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*
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* PIRQ and SMI disabled, no R/W bits set in USBLEGSUP;
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* Controller is stopped and configured with EGSM set;
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* No interrupts enabled except possibly Resume Detect.
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*
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* If any of these conditions are violated we do a complete reset.
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*/
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pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup);
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if (legsup & ~(USBLEGSUP_RO | USBLEGSUP_RWC)) {
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dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n",
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__FUNCTION__, legsup);
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goto reset_needed;
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}
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cmd = inw(uhci->io_addr + USBCMD);
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if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
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dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
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__FUNCTION__, cmd);
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goto reset_needed;
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}
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intr = inw(uhci->io_addr + USBINTR);
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if (intr & (~USBINTR_RESUME)) {
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dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
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__FUNCTION__, intr);
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goto reset_needed;
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}
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return;
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reset_needed:
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dev_dbg(uhci_dev(uhci), "Performing full reset\n");
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reset_hc(uhci);
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if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
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finish_reset(uhci);
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}
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/*
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@ -714,7 +658,7 @@ static void uhci_stop(struct usb_hcd *hcd)
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spin_lock_irq(&uhci->lock);
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if (!uhci->hc_inaccessible)
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reset_hc(uhci);
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hc_died(uhci);
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uhci_scan_schedule(uhci, NULL);
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spin_unlock_irq(&uhci->lock);
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