coresight: perf: Add "sinks" group to PMU directory
Add a "sinks" directory entry so that users can see all the sinks available in the system in a single place. Individual sink are added as they are registered with the coresight bus. Committer tests: Test built on a ubuntu 18.04 container with a cross build environment to arm64, the new field is there, need to find a machine with this feature to do further testing in the future. root@d15263e5734a:/git/perf# grep CORESIGHT /tmp/build/v5.0-rc2+/.config CONFIG_CORESIGHT=y CONFIG_CORESIGHT_LINKS_AND_SINKS=y CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y CONFIG_CORESIGHT_CATU=y CONFIG_CORESIGHT_SINK_TPIU=y CONFIG_CORESIGHT_SINK_ETBV10=y CONFIG_CORESIGHT_SOURCE_ETM4X=y CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y CONFIG_CORESIGHT_STM=y CONFIG_CORESIGHT_CPU_DEBUG=m root@d15263e5734a:/git/perf# root@d15263e5734a:/git/perf# file /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/*.o .../coresight/coresight-catu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-cpu-debug.mod.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-cpu-debug.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-dynamic-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-etb10.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-etm-perf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-etm4x-sysfs.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-etm4x.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-funnel.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-stm.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-tmc-etf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-tmc-etr.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-tmc.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight-tpiu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped .../coresight/of_coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped root@d15263e5734a:/git/perf# root@d15263e5734a:/git/perf# pahole -C coresight_device /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/coresight.o struct coresight_device { struct coresight_connection * conns; /* 0 8 */ int nr_inport; /* 8 4 */ int nr_outport; /* 12 4 */ enum coresight_dev_type type; /* 16 4 */ union coresight_dev_subtype subtype; /* 20 8 */ /* XXX 4 bytes hole, try to pack */ const struct coresight_ops * ops; /* 32 8 */ struct device dev; /* 40 1408 */ /* XXX last struct has 7 bytes of padding */ /* --- cacheline 22 boundary (1408 bytes) was 40 bytes ago --- */ atomic_t * refcnt; /* 1448 8 */ bool orphan; /* 1456 1 */ bool enable; /* 1457 1 */ bool activated; /* 1458 1 */ /* XXX 5 bytes hole, try to pack */ struct dev_ext_attribute * ea; /* 1464 8 */ /* size: 1472, cachelines: 23, members: 12 */ /* sum members: 1463, holes: 2, sum holes: 9 */ /* paddings: 1, sum paddings: 7 */ }; root@d15263e5734a:/git/perf# Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-s390@vger.kernel.org Link: http://lkml.kernel.org/r/20190131184714.20388-3-mathieu.poirier@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -14,6 +14,7 @@
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#include <linux/perf_event.h>
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#include <linux/percpu-defs.h>
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#include <linux/slab.h>
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#include <linux/stringhash.h>
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#include <linux/types.h>
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#include <linux/workqueue.h>
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@ -43,8 +44,18 @@ static const struct attribute_group etm_pmu_format_group = {
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.attrs = etm_config_formats_attr,
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};
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static struct attribute *etm_config_sinks_attr[] = {
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NULL,
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};
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static const struct attribute_group etm_pmu_sinks_group = {
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.name = "sinks",
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.attrs = etm_config_sinks_attr,
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};
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static const struct attribute_group *etm_pmu_attr_groups[] = {
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&etm_pmu_format_group,
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&etm_pmu_sinks_group,
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NULL,
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};
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@ -479,6 +490,77 @@ int etm_perf_symlink(struct coresight_device *csdev, bool link)
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return 0;
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}
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static ssize_t etm_perf_sink_name_show(struct device *dev,
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struct device_attribute *dattr,
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char *buf)
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{
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struct dev_ext_attribute *ea;
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ea = container_of(dattr, struct dev_ext_attribute, attr);
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return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
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}
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int etm_perf_add_symlink_sink(struct coresight_device *csdev)
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{
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int ret;
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unsigned long hash;
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const char *name;
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struct device *pmu_dev = etm_pmu.dev;
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struct device *pdev = csdev->dev.parent;
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struct dev_ext_attribute *ea;
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if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
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csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
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return -EINVAL;
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if (csdev->ea != NULL)
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return -EINVAL;
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if (!etm_perf_up)
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return -EPROBE_DEFER;
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ea = devm_kzalloc(pdev, sizeof(*ea), GFP_KERNEL);
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if (!ea)
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return -ENOMEM;
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name = dev_name(pdev);
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/* See function coresight_get_sink_by_id() to know where this is used */
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hash = hashlen_hash(hashlen_string(NULL, name));
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ea->attr.attr.name = devm_kstrdup(pdev, name, GFP_KERNEL);
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if (!ea->attr.attr.name)
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return -ENOMEM;
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ea->attr.attr.mode = 0444;
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ea->attr.show = etm_perf_sink_name_show;
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ea->var = (unsigned long *)hash;
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ret = sysfs_add_file_to_group(&pmu_dev->kobj,
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&ea->attr.attr, "sinks");
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if (!ret)
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csdev->ea = ea;
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return ret;
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}
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void etm_perf_del_symlink_sink(struct coresight_device *csdev)
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{
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struct device *pmu_dev = etm_pmu.dev;
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struct dev_ext_attribute *ea = csdev->ea;
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if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
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csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
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return;
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if (!ea)
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return;
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sysfs_remove_file_from_group(&pmu_dev->kobj,
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&ea->attr.attr, "sinks");
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csdev->ea = NULL;
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}
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static int __init etm_perf_init(void)
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{
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int ret;
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@ -59,6 +59,8 @@ struct etm_event_data {
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#ifdef CONFIG_CORESIGHT
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int etm_perf_symlink(struct coresight_device *csdev, bool link);
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int etm_perf_add_symlink_sink(struct coresight_device *csdev);
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void etm_perf_del_symlink_sink(struct coresight_device *csdev);
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static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
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{
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struct etm_event_data *data = perf_get_aux(handle);
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@ -70,7 +72,9 @@ static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
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#else
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static inline int etm_perf_symlink(struct coresight_device *csdev, bool link)
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{ return -EINVAL; }
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int etm_perf_add_symlink_sink(struct coresight_device *csdev)
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{ return -EINVAL; }
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void etm_perf_del_symlink_sink(struct coresight_device *csdev) {}
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static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
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{
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return NULL;
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@ -18,6 +18,7 @@
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#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include "coresight-etm-perf.h"
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#include "coresight-priv.h"
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static DEFINE_MUTEX(coresight_mutex);
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@ -1167,6 +1168,22 @@ struct coresight_device *coresight_register(struct coresight_desc *desc)
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goto err_out;
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}
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if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
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csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
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ret = etm_perf_add_symlink_sink(csdev);
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if (ret) {
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device_unregister(&csdev->dev);
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/*
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* As with the above, all resources are free'd
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* explicitly via coresight_device_release() triggered
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* from put_device(), which is in turn called from
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* function device_unregister().
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*/
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goto err_out;
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}
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}
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mutex_lock(&coresight_mutex);
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coresight_fixup_device_conns(csdev);
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@ -1185,6 +1202,7 @@ EXPORT_SYMBOL_GPL(coresight_register);
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void coresight_unregister(struct coresight_device *csdev)
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{
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etm_perf_del_symlink_sink(csdev);
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/* Remove references of that device in the topology */
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coresight_remove_conns(csdev);
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device_unregister(&csdev->dev);
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@ -154,8 +154,9 @@ struct coresight_connection {
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* @orphan: true if the component has connections that haven't been linked.
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* @enable: 'true' if component is currently part of an active path.
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* @activated: 'true' only if a _sink_ has been activated. A sink can be
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activated but not yet enabled. Enabling for a _sink_
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happens when a source has been selected for that it.
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* activated but not yet enabled. Enabling for a _sink_
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* appens when a source has been selected for that it.
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* @ea: Device attribute for sink representation under PMU directory.
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*/
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struct coresight_device {
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struct coresight_connection *conns;
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@ -168,7 +169,9 @@ struct coresight_device {
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atomic_t *refcnt;
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bool orphan;
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bool enable; /* true only if configured as part of a path */
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/* sink specific fields */
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bool activated; /* true only if a sink is part of a path */
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struct dev_ext_attribute *ea;
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};
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#define to_coresight_device(d) container_of(d, struct coresight_device, dev)
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