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hpt366: fix clock turnaround

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DPLL clock (0x21) should be used for writes and PCI clock (0x23) for reads,
not vice versa.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sergei Shtylyov 2010-09-27 11:01:32 -07:00 committed by David S. Miller
parent 5d3f1a493e
commit bbe54d78cc
1 changed files with 1 additions and 1 deletions
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2
drivers/ide/hpt366.c
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@ -838,7 +838,7 @@ static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq)
{
hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x23 : 0x21);
hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x21 : 0x23);
}
/**