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net/mlx5e: Move RSS params to a dedicated struct

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Remove RSS params from params struct under channels, and introduce
a new struct with RSS configuration params under priv struct. There is
no functional change here.

Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Aya Levin 2018-11-06 21:05:29 +02:00 committed by Saeed Mahameed
parent d930ac796f
commit bbeb53b8b2
6 changed files with 62 additions and 47 deletions
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16
drivers/net/ethernet/mellanox/mlx5/core/en.h
View File

@ -244,9 +244,6 @@ struct mlx5e_params {
bool lro_en; bool lro_en;
u32 lro_wqe_sz; u32 lro_wqe_sz;
u8 tx_min_inline_mode; u8 tx_min_inline_mode;
u8 rss_hfunc;
u8 toeplitz_hash_key[40];
u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE];
bool vlan_strip_disable; bool vlan_strip_disable;
bool scatter_fcs_en; bool scatter_fcs_en;
bool rx_dim_enabled; bool rx_dim_enabled;
@ -651,6 +648,12 @@ enum {
MLX5E_NIC_PRIO MLX5E_NIC_PRIO
}; };
struct mlx5e_rss_params {
u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE];
u8 toeplitz_hash_key[40];
u8 hfunc;
};
struct mlx5e_priv { struct mlx5e_priv {
/* priv data path fields - start */ /* priv data path fields - start */
struct mlx5e_txqsq *txq2sq[MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC]; struct mlx5e_txqsq *txq2sq[MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC];
@ -671,6 +674,7 @@ struct mlx5e_priv {
struct mlx5e_tir indir_tir[MLX5E_NUM_INDIR_TIRS]; struct mlx5e_tir indir_tir[MLX5E_NUM_INDIR_TIRS];
struct mlx5e_tir inner_indir_tir[MLX5E_NUM_INDIR_TIRS]; struct mlx5e_tir inner_indir_tir[MLX5E_NUM_INDIR_TIRS];
struct mlx5e_tir direct_tir[MLX5E_MAX_NUM_CHANNELS]; struct mlx5e_tir direct_tir[MLX5E_MAX_NUM_CHANNELS];
struct mlx5e_rss_params rss_params;
u32 tx_rates[MLX5E_MAX_NUM_SQS]; u32 tx_rates[MLX5E_MAX_NUM_SQS];
struct mlx5e_flow_steering fs; struct mlx5e_flow_steering fs;
@ -796,7 +800,7 @@ struct mlx5e_redirect_rqt_param {
int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz,
struct mlx5e_redirect_rqt_param rrp); struct mlx5e_redirect_rqt_param rrp);
void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_params *params, void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_rss_params *rss_params,
const struct mlx5e_tirc_config *ttconfig, const struct mlx5e_tirc_config *ttconfig,
void *tirc, bool inner); void *tirc, bool inner);
void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen); void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen);
@ -982,11 +986,13 @@ int mlx5e_attach_netdev(struct mlx5e_priv *priv);
void mlx5e_detach_netdev(struct mlx5e_priv *priv); void mlx5e_detach_netdev(struct mlx5e_priv *priv);
void mlx5e_destroy_netdev(struct mlx5e_priv *priv); void mlx5e_destroy_netdev(struct mlx5e_priv *priv);
void mlx5e_build_nic_params(struct mlx5_core_dev *mdev, void mlx5e_build_nic_params(struct mlx5_core_dev *mdev,
struct mlx5e_rss_params *rss_params,
struct mlx5e_params *params, struct mlx5e_params *params,
u16 max_channels, u16 mtu); u16 max_channels, u16 mtu);
void mlx5e_build_rq_params(struct mlx5_core_dev *mdev, void mlx5e_build_rq_params(struct mlx5_core_dev *mdev,
struct mlx5e_params *params); struct mlx5e_params *params);
void mlx5e_build_rss_params(struct mlx5e_params *params); void mlx5e_build_rss_params(struct mlx5e_rss_params *rss_params,
u16 num_channels);
u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev); u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev);
void mlx5e_rx_dim_work(struct work_struct *work); void mlx5e_rx_dim_work(struct work_struct *work);
void mlx5e_tx_dim_work(struct work_struct *work); void mlx5e_tx_dim_work(struct work_struct *work);

34
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
View File

@ -353,7 +353,7 @@ int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
new_channels.params = priv->channels.params; new_channels.params = priv->channels.params;
new_channels.params.num_channels = count; new_channels.params.num_channels = count;
if (!netif_is_rxfh_configured(priv->netdev)) if (!netif_is_rxfh_configured(priv->netdev))
mlx5e_build_default_indir_rqt(new_channels.params.indirection_rqt, mlx5e_build_default_indir_rqt(priv->rss_params.indirection_rqt,
MLX5E_INDIR_RQT_SIZE, count); MLX5E_INDIR_RQT_SIZE, count);
if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) { if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
@ -931,7 +931,7 @@ out:
u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv) u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
{ {
return sizeof(priv->channels.params.toeplitz_hash_key); return sizeof(priv->rss_params.toeplitz_hash_key);
} }
static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev) static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
@ -957,17 +957,18 @@ static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
u8 *hfunc) u8 *hfunc)
{ {
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
struct mlx5e_rss_params *rss = &priv->rss_params;
if (indir) if (indir)
memcpy(indir, priv->channels.params.indirection_rqt, memcpy(indir, rss->indirection_rqt,
sizeof(priv->channels.params.indirection_rqt)); sizeof(rss->indirection_rqt));
if (key) if (key)
memcpy(key, priv->channels.params.toeplitz_hash_key, memcpy(key, rss->toeplitz_hash_key,
sizeof(priv->channels.params.toeplitz_hash_key)); sizeof(rss->toeplitz_hash_key));
if (hfunc) if (hfunc)
*hfunc = priv->channels.params.rss_hfunc; *hfunc = rss->hfunc;
return 0; return 0;
} }
@ -976,6 +977,7 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
const u8 *key, const u8 hfunc) const u8 *key, const u8 hfunc)
{ {
struct mlx5e_priv *priv = netdev_priv(dev); struct mlx5e_priv *priv = netdev_priv(dev);
struct mlx5e_rss_params *rss = &priv->rss_params;
int inlen = MLX5_ST_SZ_BYTES(modify_tir_in); int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
bool hash_changed = false; bool hash_changed = false;
void *in; void *in;
@ -991,15 +993,14 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
mutex_lock(&priv->state_lock); mutex_lock(&priv->state_lock);
if (hfunc != ETH_RSS_HASH_NO_CHANGE && if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
hfunc != priv->channels.params.rss_hfunc) { rss->hfunc = hfunc;
priv->channels.params.rss_hfunc = hfunc;
hash_changed = true; hash_changed = true;
} }
if (indir) { if (indir) {
memcpy(priv->channels.params.indirection_rqt, indir, memcpy(rss->indirection_rqt, indir,
sizeof(priv->channels.params.indirection_rqt)); sizeof(rss->indirection_rqt));
if (test_bit(MLX5E_STATE_OPENED, &priv->state)) { if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
u32 rqtn = priv->indir_rqt.rqtn; u32 rqtn = priv->indir_rqt.rqtn;
@ -1007,7 +1008,7 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
.is_rss = true, .is_rss = true,
{ {
.rss = { .rss = {
.hfunc = priv->channels.params.rss_hfunc, .hfunc = rss->hfunc,
.channels = &priv->channels, .channels = &priv->channels,
}, },
}, },
@ -1018,10 +1019,9 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
} }
if (key) { if (key) {
memcpy(priv->channels.params.toeplitz_hash_key, key, memcpy(rss->toeplitz_hash_key, key,
sizeof(priv->channels.params.toeplitz_hash_key)); sizeof(rss->toeplitz_hash_key));
hash_changed = hash_changed || hash_changed = hash_changed || rss->hfunc == ETH_RSS_HASH_TOP;
priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
} }
if (hash_changed) if (hash_changed)

43
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
View File

@ -2504,7 +2504,7 @@ static void mlx5e_fill_rqt_rqns(struct mlx5e_priv *priv, int sz,
if (rrp.rss.hfunc == ETH_RSS_HASH_XOR) if (rrp.rss.hfunc == ETH_RSS_HASH_XOR)
ix = mlx5e_bits_invert(i, ilog2(sz)); ix = mlx5e_bits_invert(i, ilog2(sz));
ix = priv->channels.params.indirection_rqt[ix]; ix = priv->rss_params.indirection_rqt[ix];
rqn = rrp.rss.channels->c[ix]->rq.rqn; rqn = rrp.rss.channels->c[ix]->rq.rqn;
} else { } else {
rqn = rrp.rqn; rqn = rrp.rqn;
@ -2587,7 +2587,7 @@ static void mlx5e_redirect_rqts_to_channels(struct mlx5e_priv *priv,
{ {
.rss = { .rss = {
.channels = chs, .channels = chs,
.hfunc = chs->params.rss_hfunc, .hfunc = priv->rss_params.hfunc,
} }
}, },
}; };
@ -2670,22 +2670,22 @@ static void mlx5e_build_tir_ctx_lro(struct mlx5e_params *params, void *tirc)
MLX5_SET(tirc, tirc, lro_timeout_period_usecs, params->lro_timeout); MLX5_SET(tirc, tirc, lro_timeout_period_usecs, params->lro_timeout);
} }
void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_params *params, void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_rss_params *rss_params,
const struct mlx5e_tirc_config *ttconfig, const struct mlx5e_tirc_config *ttconfig,
void *tirc, bool inner) void *tirc, bool inner)
{ {
void *hfso = inner ? MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner) : void *hfso = inner ? MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner) :
MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
MLX5_SET(tirc, tirc, rx_hash_fn, mlx5e_rx_hash_fn(params->rss_hfunc)); MLX5_SET(tirc, tirc, rx_hash_fn, mlx5e_rx_hash_fn(rss_params->hfunc));
if (params->rss_hfunc == ETH_RSS_HASH_TOP) { if (rss_params->hfunc == ETH_RSS_HASH_TOP) {
void *rss_key = MLX5_ADDR_OF(tirc, tirc, void *rss_key = MLX5_ADDR_OF(tirc, tirc,
rx_hash_toeplitz_key); rx_hash_toeplitz_key);
size_t len = MLX5_FLD_SZ_BYTES(tirc, size_t len = MLX5_FLD_SZ_BYTES(tirc,
rx_hash_toeplitz_key); rx_hash_toeplitz_key);
MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);
memcpy(rss_key, params->toeplitz_hash_key, len); memcpy(rss_key, rss_params->toeplitz_hash_key, len);
} }
MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
ttconfig->l3_prot_type); ttconfig->l3_prot_type);
@ -2706,7 +2706,7 @@ void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
memset(tirc, 0, ctxlen); memset(tirc, 0, ctxlen);
mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, mlx5e_build_indir_tir_ctx_hash(&priv->rss_params,
&tirc_default_config[tt], &tirc_default_config[tt],
tirc, false); tirc, false);
mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen); mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
@ -2717,7 +2717,7 @@ void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
memset(tirc, 0, ctxlen); memset(tirc, 0, ctxlen);
mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, mlx5e_build_indir_tir_ctx_hash(&priv->rss_params,
&tirc_default_config[tt], &tirc_default_config[tt],
tirc, true); tirc, true);
mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in,
@ -2778,7 +2778,7 @@ static void mlx5e_build_inner_indir_tir_ctx(struct mlx5e_priv *priv,
MLX5_SET(tirc, tirc, indirect_table, priv->indir_rqt.rqtn); MLX5_SET(tirc, tirc, indirect_table, priv->indir_rqt.rqtn);
MLX5_SET(tirc, tirc, tunneled_offload_en, 0x1); MLX5_SET(tirc, tirc, tunneled_offload_en, 0x1);
mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, mlx5e_build_indir_tir_ctx_hash(&priv->rss_params,
&tirc_default_config[tt], tirc, true); &tirc_default_config[tt], tirc, true);
} }
@ -3172,7 +3172,7 @@ static void mlx5e_build_indir_tir_ctx(struct mlx5e_priv *priv,
MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
MLX5_SET(tirc, tirc, indirect_table, priv->indir_rqt.rqtn); MLX5_SET(tirc, tirc, indirect_table, priv->indir_rqt.rqtn);
mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, mlx5e_build_indir_tir_ctx_hash(&priv->rss_params,
&tirc_default_config[tt], tirc, false); &tirc_default_config[tt], tirc, false);
} }
@ -4511,15 +4511,18 @@ void mlx5e_build_rq_params(struct mlx5_core_dev *mdev,
mlx5e_init_rq_type_params(mdev, params); mlx5e_init_rq_type_params(mdev, params);
} }
void mlx5e_build_rss_params(struct mlx5e_params *params) void mlx5e_build_rss_params(struct mlx5e_rss_params *rss_params,
u16 num_channels)
{ {
params->rss_hfunc = ETH_RSS_HASH_XOR; rss_params->hfunc = ETH_RSS_HASH_XOR;
netdev_rss_key_fill(params->toeplitz_hash_key, sizeof(params->toeplitz_hash_key)); netdev_rss_key_fill(rss_params->toeplitz_hash_key,
mlx5e_build_default_indir_rqt(params->indirection_rqt, sizeof(rss_params->toeplitz_hash_key));
MLX5E_INDIR_RQT_SIZE, params->num_channels); mlx5e_build_default_indir_rqt(rss_params->indirection_rqt,
MLX5E_INDIR_RQT_SIZE, num_channels);
} }
void mlx5e_build_nic_params(struct mlx5_core_dev *mdev, void mlx5e_build_nic_params(struct mlx5_core_dev *mdev,
struct mlx5e_rss_params *rss_params,
struct mlx5e_params *params, struct mlx5e_params *params,
u16 max_channels, u16 mtu) u16 max_channels, u16 mtu)
{ {
@ -4568,7 +4571,7 @@ void mlx5e_build_nic_params(struct mlx5_core_dev *mdev,
params->tx_min_inline_mode = mlx5e_params_calculate_tx_min_inline(mdev); params->tx_min_inline_mode = mlx5e_params_calculate_tx_min_inline(mdev);
/* RSS */ /* RSS */
mlx5e_build_rss_params(params); mlx5e_build_rss_params(rss_params, params->num_channels);
} }
static void mlx5e_set_netdev_dev_addr(struct net_device *netdev) static void mlx5e_set_netdev_dev_addr(struct net_device *netdev)
@ -4741,14 +4744,16 @@ static int mlx5e_nic_init(struct mlx5_core_dev *mdev,
void *ppriv) void *ppriv)
{ {
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
struct mlx5e_rss_params *rss = &priv->rss_params;
int err; int err;
err = mlx5e_netdev_init(netdev, priv, mdev, profile, ppriv); err = mlx5e_netdev_init(netdev, priv, mdev, profile, ppriv);
if (err) if (err)
return err; return err;
mlx5e_build_nic_params(mdev, &priv->channels.params, mlx5e_build_nic_params(mdev, rss, &priv->channels.params,
mlx5e_get_netdev_max_channels(netdev), netdev->mtu); mlx5e_get_netdev_max_channels(netdev),
netdev->mtu);
mlx5e_timestamp_init(priv); mlx5e_timestamp_init(priv);
@ -5023,7 +5028,7 @@ int mlx5e_attach_netdev(struct mlx5e_priv *priv)
if (priv->channels.params.num_channels > max_nch) { if (priv->channels.params.num_channels > max_nch) {
mlx5_core_warn(priv->mdev, "MLX5E: Reducing number of channels to %d\n", max_nch); mlx5_core_warn(priv->mdev, "MLX5E: Reducing number of channels to %d\n", max_nch);
priv->channels.params.num_channels = max_nch; priv->channels.params.num_channels = max_nch;
mlx5e_build_default_indir_rqt(priv->channels.params.indirection_rqt, mlx5e_build_default_indir_rqt(priv->rss_params.indirection_rqt,
MLX5E_INDIR_RQT_SIZE, max_nch); MLX5E_INDIR_RQT_SIZE, max_nch);
} }

9
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
View File

@ -1012,7 +1012,9 @@ static const struct net_device_ops mlx5e_netdev_ops_rep = {
}; };
static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev, static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev,
struct mlx5e_params *params, u16 mtu) struct mlx5e_params *params,
struct mlx5e_rss_params *rss_params,
u16 mtu)
{ {
u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
MLX5_CQ_PERIOD_MODE_START_FROM_CQE : MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
@ -1034,7 +1036,7 @@ static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev,
mlx5_query_min_inline(mdev, &params->tx_min_inline_mode); mlx5_query_min_inline(mdev, &params->tx_min_inline_mode);
/* RSS */ /* RSS */
mlx5e_build_rss_params(params); mlx5e_build_rss_params(rss_params, params->num_channels);
} }
static void mlx5e_build_rep_netdev(struct net_device *netdev) static void mlx5e_build_rep_netdev(struct net_device *netdev)
@ -1087,7 +1089,8 @@ static int mlx5e_init_rep(struct mlx5_core_dev *mdev,
priv->channels.params.num_channels = priv->channels.params.num_channels =
mlx5e_get_netdev_max_channels(netdev); mlx5e_get_netdev_max_channels(netdev);
mlx5e_build_rep_params(mdev, &priv->channels.params, netdev->mtu); mlx5e_build_rep_params(mdev, &priv->channels.params,
&priv->rss_params, netdev->mtu);
mlx5e_build_rep_netdev(netdev); mlx5e_build_rep_netdev(netdev);
mlx5e_timestamp_init(priv); mlx5e_timestamp_init(priv);

5
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
View File

@ -316,7 +316,7 @@ static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
for (i = 0; i < sz; i++) { for (i = 0; i < sz; i++) {
ix = i; ix = i;
if (priv->channels.params.rss_hfunc == ETH_RSS_HASH_XOR) if (priv->rss_params.hfunc == ETH_RSS_HASH_XOR)
ix = mlx5e_bits_invert(i, ilog2(sz)); ix = mlx5e_bits_invert(i, ilog2(sz));
ix = indirection_rqt[ix]; ix = indirection_rqt[ix];
rqn = hp->pair->rqn[ix]; rqn = hp->pair->rqn[ix];
@ -368,7 +368,8 @@ static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
MLX5_SET(tirc, tirc, transport_domain, hp->tdn); MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn); MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, &ttconfig, tirc, false); mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false);
err = mlx5_core_create_tir(hp->func_mdev, in, err = mlx5_core_create_tir(hp->func_mdev, in,
MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]); MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]);
if (err) { if (err) {

2
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
View File

@ -87,7 +87,7 @@ int mlx5i_init(struct mlx5_core_dev *mdev,
mlx5_query_port_max_mtu(mdev, &max_mtu, 1); mlx5_query_port_max_mtu(mdev, &max_mtu, 1);
netdev->mtu = max_mtu; netdev->mtu = max_mtu;
mlx5e_build_nic_params(mdev, &priv->channels.params, mlx5e_build_nic_params(mdev, &priv->rss_params, &priv->channels.params,
mlx5e_get_netdev_max_channels(netdev), mlx5e_get_netdev_max_channels(netdev),
netdev->mtu); netdev->mtu);
mlx5i_build_nic_params(mdev, &priv->channels.params); mlx5i_build_nic_params(mdev, &priv->channels.params);