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ASoC: cs42l42: Remove redundant pll_divout member

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Now that struct cs42l42_private has pll_config, the current PLL
configuration can be looked up directly in pll_ratio_table. This
makes the pll_divout member of cs42l42_private redundant since it
was only a copy of the value from pll_ratio_table.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20211116163901.45390-5-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Richard Fitzgerald 2021-11-16 16:39:01 +00:00 committed by Mark Brown
parent 3edde6de09
commit bbf0e1d365
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 3 additions and 7 deletions
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9
sound/soc/codecs/cs42l42.c
View File

@ -734,10 +734,6 @@ static int cs42l42_pll_config(struct snd_soc_component *component)
CS42L42_PLL_DIVOUT_MASK,
(pll_ratio_table[i].pll_divout * pll_ratio_table[i].n)
<< CS42L42_PLL_DIVOUT_SHIFT);
if (pll_ratio_table[i].n != 1)
cs42l42->pll_divout = pll_ratio_table[i].pll_divout;
else
cs42l42->pll_divout = 0;
snd_soc_component_update_bits(component,
CS42L42_PLL_CAL_RATIO,
CS42L42_PLL_CAL_RATIO_MASK,
@ -1004,12 +1000,13 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,
CS42L42_PLL_START_MASK, 1);
if (cs42l42->pll_divout) {
if (pll_ratio_table[cs42l42->pll_config].n > 1) {
usleep_range(CS42L42_PLL_DIVOUT_TIME_US,
CS42L42_PLL_DIVOUT_TIME_US * 2);
regval = pll_ratio_table[cs42l42->pll_config].pll_divout;
snd_soc_component_update_bits(component, CS42L42_PLL_CTL3,
CS42L42_PLL_DIVOUT_MASK,
cs42l42->pll_divout <<
regval <<
CS42L42_PLL_DIVOUT_SHIFT);
}

1
sound/soc/codecs/cs42l42.h
View File

@ -845,7 +845,6 @@ struct cs42l42_private {
int bclk;
u32 sclk;
u32 srate;
u8 pll_divout;
u8 plug_state;
u8 hs_type;
u8 ts_inv;