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arm64: dts: imx8m: add mu node

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Add mu node to let A53 could communicate with M Core.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Peng Fan 2020-06-01 16:20:01 +08:00 committed by Shawn Guo
parent 12fa1078ef
commit bbfc59bec2
4 changed files with 32 additions and 0 deletions
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8
arch/arm64/boot/dts/freescale/imx8mm.dtsi
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@ -775,6 +775,14 @@
status = "disabled";
};
mu: mailbox@30aa0000 {
compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
reg = <0x30aa0000 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_MU_ROOT>;
#mbox-cells = <2>;
};
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;

8
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View File

@ -675,6 +675,14 @@
status = "disabled";
};
mu: mailbox@30aa0000 {
compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
reg = <0x30aa0000 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_MU_ROOT>;
#mbox-cells = <2>;
};
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;

8
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -627,6 +627,14 @@
status = "disabled";
};
mu: mailbox@30aa0000 {
compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
reg = <0x30aa0000 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_MU_ROOT>;
#mbox-cells = <2>;
};
i2c5: i2c@30ad0000 {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;

8
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@ -963,6 +963,14 @@
status = "disabled";
};
mu: mailbox@30aa0000 {
compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
reg = <0x30aa0000 0x10000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
#mbox-cells = <2>;
};
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";