drm/i915/dp: fix DG1 and RKL max source rates
Combo phy is limited to 5.4 GHz on low-voltage SKUs, but both eDP and DP can do 8.1 GHz on combo phy. Bspec: 49182, 49205, 49202 Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210901160402.24816-5-animesh.manna@intel.com
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@ -325,6 +325,18 @@ static int ehl_max_source_rate(struct intel_dp *intel_dp)
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return 810000;
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}
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static int dg1_max_source_rate(struct intel_dp *intel_dp)
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{
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
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enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
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if (intel_phy_is_combo(i915, phy) && is_low_voltage_sku(i915, phy))
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return 540000;
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return 810000;
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}
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static void
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intel_dp_set_source_rates(struct intel_dp *intel_dp)
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{
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@ -360,6 +372,8 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
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size = ARRAY_SIZE(icl_rates);
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if (IS_DG2(dev_priv))
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max_rate = dg2_max_source_rate(intel_dp);
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else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
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max_rate = dg1_max_source_rate(intel_dp);
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else if (IS_JSL_EHL(dev_priv))
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max_rate = ehl_max_source_rate(intel_dp);
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else
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