media: dt-bindings: media: camss: Add qcom,sc8280xp-camss binding
Add bindings for qcom,sc8280xp-camss in order to support the camera subsystem for sc8280xp as found in the Lenovo x13s Laptop. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
This commit is contained in:
Bryan O'Donoghue
Hans Verkuil
parent
50a0844bf8
commit
bc5191e579
512
Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml
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512
Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/qcom,sc8280xp-camss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SC8280XP Camera Subsystem (CAMSS)
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maintainers:
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- Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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description: |
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The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
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properties:
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compatible:
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const: qcom,sc8280xp-camss
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clocks:
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maxItems: 40
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clock-names:
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items:
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- const: camnoc_axi
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- const: cpas_ahb
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- const: csiphy0
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- const: csiphy0_timer
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- const: csiphy1
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- const: csiphy1_timer
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- const: csiphy2
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- const: csiphy2_timer
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- const: csiphy3
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- const: csiphy3_timer
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- const: vfe0_axi
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- const: vfe0
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- const: vfe0_cphy_rx
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- const: vfe0_csid
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- const: vfe1_axi
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- const: vfe1
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- const: vfe1_cphy_rx
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- const: vfe1_csid
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- const: vfe2_axi
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- const: vfe2
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- const: vfe2_cphy_rx
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- const: vfe2_csid
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- const: vfe3_axi
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- const: vfe3
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- const: vfe3_cphy_rx
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- const: vfe3_csid
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- const: vfe_lite0
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- const: vfe_lite0_cphy_rx
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- const: vfe_lite0_csid
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- const: vfe_lite1
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- const: vfe_lite1_cphy_rx
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- const: vfe_lite1_csid
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- const: vfe_lite2
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- const: vfe_lite2_cphy_rx
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- const: vfe_lite2_csid
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- const: vfe_lite3
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- const: vfe_lite3_cphy_rx
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- const: vfe_lite3_csid
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- const: gcc_axi_hf
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- const: gcc_axi_sf
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interrupts:
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maxItems: 20
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interrupt-names:
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items:
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- const: csid1_lite
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- const: vfe_lite1
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- const: csiphy3
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- const: csid0
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- const: vfe0
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- const: csid1
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- const: vfe1
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- const: csid0_lite
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- const: vfe_lite0
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- const: csiphy0
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- const: csiphy1
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- const: csiphy2
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- const: csid2
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- const: vfe2
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- const: csid3_lite
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- const: csid2_lite
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- const: vfe_lite3
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- const: vfe_lite2
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- const: csid3
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- const: vfe3
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iommus:
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maxItems: 16
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interconnects:
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maxItems: 4
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interconnect-names:
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items:
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- const: cam_ahb
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- const: cam_hf_mnoc
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- const: cam_sf_mnoc
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- const: cam_sf_icp_mnoc
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power-domains:
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items:
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- description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
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- description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
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- description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller.
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- description: IFE3 GDSC - Image Front End, Global Distributed Switch Controller.
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- description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller.
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power-domain-names:
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items:
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- const: ife0
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- const: ife1
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- const: ife2
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- const: ife3
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- const: top
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description:
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CSI input ports.
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port for receiving CSI data from CSIPHY0.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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clock-lanes:
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maxItems: 1
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data-lanes:
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minItems: 1
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maxItems: 4
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required:
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- clock-lanes
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- data-lanes
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port@1:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port for receiving CSI data from CSIPHY1.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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clock-lanes:
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maxItems: 1
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data-lanes:
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minItems: 1
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maxItems: 4
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required:
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- clock-lanes
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- data-lanes
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port@2:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port for receiving CSI data from CSIPHY2.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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clock-lanes:
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maxItems: 1
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data-lanes:
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minItems: 1
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maxItems: 4
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required:
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- clock-lanes
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- data-lanes
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port@3:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port for receiving CSI data from CSIPHY3.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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clock-lanes:
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maxItems: 1
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data-lanes:
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minItems: 1
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maxItems: 4
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required:
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- clock-lanes
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- data-lanes
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reg:
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maxItems: 20
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reg-names:
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items:
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- const: csiphy2
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- const: csiphy3
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- const: csiphy0
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- const: csiphy1
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- const: vfe0
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- const: csid0
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- const: vfe1
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- const: csid1
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- const: vfe2
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- const: csid2
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- const: vfe_lite0
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- const: csid0_lite
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- const: vfe_lite1
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- const: csid1_lite
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- const: vfe_lite2
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- const: csid2_lite
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- const: vfe_lite3
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- const: csid3_lite
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- const: vfe3
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- const: csid3
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vdda-phy-supply:
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description:
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Phandle to a regulator supply to PHY core block.
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vdda-pll-supply:
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description:
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Phandle to 1.8V regulator supply to PHY refclk pll block.
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required:
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- clock-names
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- clocks
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- compatible
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- interconnects
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- interconnect-names
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- interrupts
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- interrupt-names
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- iommus
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- power-domains
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- power-domain-names
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- reg
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- reg-names
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- vdda-phy-supply
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- vdda-pll-supply
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
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#include <dt-bindings/clock/qcom,sc8280xp-camcc.h>
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#include <dt-bindings/interconnect/qcom,sc8280xp.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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camss: camss@ac5a000 {
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compatible = "qcom,sc8280xp-camss";
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reg = <0 0x0ac5a000 0 0x2000>,
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<0 0x0ac5c000 0 0x2000>,
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<0 0x0ac65000 0 0x2000>,
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<0 0x0ac67000 0 0x2000>,
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<0 0x0acaf000 0 0x4000>,
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<0 0x0acb3000 0 0x1000>,
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<0 0x0acb6000 0 0x4000>,
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<0 0x0acba000 0 0x1000>,
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<0 0x0acbd000 0 0x4000>,
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<0 0x0acc1000 0 0x1000>,
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<0 0x0acc4000 0 0x4000>,
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<0 0x0acc8000 0 0x1000>,
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<0 0x0accb000 0 0x4000>,
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<0 0x0accf000 0 0x1000>,
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<0 0x0acd2000 0 0x4000>,
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<0 0x0acd6000 0 0x1000>,
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<0 0x0acd9000 0 0x4000>,
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<0 0x0acdd000 0 0x1000>,
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<0 0x0ace0000 0 0x4000>,
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<0 0x0ace4000 0 0x1000>;
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reg-names = "csiphy2",
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"csiphy3",
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"csiphy0",
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"csiphy1",
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"vfe0",
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"csid0",
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"vfe1",
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"csid1",
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"vfe2",
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"csid2",
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"vfe_lite0",
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"csid0_lite",
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"vfe_lite1",
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"csid1_lite",
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"vfe_lite2",
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"csid2_lite",
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"vfe_lite3",
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"csid3_lite",
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"vfe3",
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"csid3";
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vdda-phy-supply = <&vreg_l6d>;
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vdda-pll-supply = <&vreg_l4d>;
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interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "csid1_lite",
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"vfe_lite1",
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"csiphy3",
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"csid0",
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"vfe0",
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"csid1",
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"vfe1",
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"csid0_lite",
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"vfe_lite0",
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"csiphy0",
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"csiphy1",
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"csiphy2",
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"csid2",
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"vfe2",
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"csid3_lite",
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"csid2_lite",
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"vfe_lite3",
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"vfe_lite2",
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"csid3",
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"vfe3";
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power-domains = <&camcc IFE_0_GDSC>,
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<&camcc IFE_1_GDSC>,
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<&camcc IFE_2_GDSC>,
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<&camcc IFE_3_GDSC>,
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<&camcc TITAN_TOP_GDSC>;
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power-domain-names = "ife0",
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"ife1",
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"ife2",
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"ife3",
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"top";
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clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
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<&camcc CAMCC_CPAS_AHB_CLK>,
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<&camcc CAMCC_CSIPHY0_CLK>,
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<&camcc CAMCC_CSI0PHYTIMER_CLK>,
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<&camcc CAMCC_CSIPHY1_CLK>,
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<&camcc CAMCC_CSI1PHYTIMER_CLK>,
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<&camcc CAMCC_CSIPHY2_CLK>,
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<&camcc CAMCC_CSI2PHYTIMER_CLK>,
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<&camcc CAMCC_CSIPHY3_CLK>,
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<&camcc CAMCC_CSI3PHYTIMER_CLK>,
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<&camcc CAMCC_IFE_0_AXI_CLK>,
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<&camcc CAMCC_IFE_0_CLK>,
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<&camcc CAMCC_IFE_0_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_0_CSID_CLK>,
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<&camcc CAMCC_IFE_1_AXI_CLK>,
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<&camcc CAMCC_IFE_1_CLK>,
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<&camcc CAMCC_IFE_1_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_1_CSID_CLK>,
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<&camcc CAMCC_IFE_2_AXI_CLK>,
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<&camcc CAMCC_IFE_2_CLK>,
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<&camcc CAMCC_IFE_2_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_2_CSID_CLK>,
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<&camcc CAMCC_IFE_3_AXI_CLK>,
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<&camcc CAMCC_IFE_3_CLK>,
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<&camcc CAMCC_IFE_3_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_3_CSID_CLK>,
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<&camcc CAMCC_IFE_LITE_0_CLK>,
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<&camcc CAMCC_IFE_LITE_0_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_LITE_0_CSID_CLK>,
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<&camcc CAMCC_IFE_LITE_1_CLK>,
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<&camcc CAMCC_IFE_LITE_1_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_LITE_1_CSID_CLK>,
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<&camcc CAMCC_IFE_LITE_2_CLK>,
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<&camcc CAMCC_IFE_LITE_2_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_LITE_2_CSID_CLK>,
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<&camcc CAMCC_IFE_LITE_3_CLK>,
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<&camcc CAMCC_IFE_LITE_3_CPHY_RX_CLK>,
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<&camcc CAMCC_IFE_LITE_3_CSID_CLK>,
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<&gcc GCC_CAMERA_HF_AXI_CLK>,
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<&gcc GCC_CAMERA_SF_AXI_CLK>;
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clock-names = "camnoc_axi",
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"cpas_ahb",
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"csiphy0",
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"csiphy0_timer",
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"csiphy1",
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"csiphy1_timer",
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"csiphy2",
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"csiphy2_timer",
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"csiphy3",
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"csiphy3_timer",
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"vfe0_axi",
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"vfe0",
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"vfe0_cphy_rx",
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"vfe0_csid",
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"vfe1_axi",
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"vfe1",
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"vfe1_cphy_rx",
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"vfe1_csid",
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"vfe2_axi",
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"vfe2",
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"vfe2_cphy_rx",
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"vfe2_csid",
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"vfe3_axi",
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"vfe3",
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"vfe3_cphy_rx",
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"vfe3_csid",
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"vfe_lite0",
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"vfe_lite0_cphy_rx",
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"vfe_lite0_csid",
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"vfe_lite1",
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"vfe_lite1_cphy_rx",
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"vfe_lite1_csid",
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"vfe_lite2",
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"vfe_lite2_cphy_rx",
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"vfe_lite2_csid",
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"vfe_lite3",
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"vfe_lite3_cphy_rx",
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"vfe_lite3_csid",
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"gcc_axi_hf",
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"gcc_axi_sf";
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iommus = <&apps_smmu 0x2000 0x4e0>,
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<&apps_smmu 0x2020 0x4e0>,
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<&apps_smmu 0x2040 0x4e0>,
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<&apps_smmu 0x2060 0x4e0>,
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<&apps_smmu 0x2080 0x4e0>,
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<&apps_smmu 0x20e0 0x4e0>,
|
||||
<&apps_smmu 0x20c0 0x4e0>,
|
||||
<&apps_smmu 0x20a0 0x4e0>,
|
||||
<&apps_smmu 0x2400 0x4e0>,
|
||||
<&apps_smmu 0x2420 0x4e0>,
|
||||
<&apps_smmu 0x2440 0x4e0>,
|
||||
<&apps_smmu 0x2460 0x4e0>,
|
||||
<&apps_smmu 0x2480 0x4e0>,
|
||||
<&apps_smmu 0x24e0 0x4e0>,
|
||||
<&apps_smmu 0x24c0 0x4e0>,
|
||||
<&apps_smmu 0x24a0 0x4e0>;
|
||||
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_CAMERA_CFG 0>,
|
||||
<&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>,
|
||||
<&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI1 0>,
|
||||
<&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI1 0>;
|
||||
interconnect-names = "cam_ahb",
|
||||
"cam_hf_mnoc",
|
||||
"cam_sf_mnoc",
|
||||
"cam_sf_icp_mnoc";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csiphy_ep0: endpoint@0 {
|
||||
reg = <0>;
|
||||
clock-lanes = <7>;
|
||||
data-lanes = <0 1>;
|
||||
remote-endpoint = <&sensor_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
x
Reference in New Issue
Block a user