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drm/amdgpu: Update total channel number for umc v8_10

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Update total channel number for umc v8_10.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Candice Li 2023-06-10 10:15:14 +08:00 committed by Alex Deucher
parent 4506f0bc15
commit bcd9a5f8b9
3 changed files with 5 additions and 1 deletions

1
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

@ -1515,6 +1515,7 @@ static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev)
mall_size += mall_size_per_umc;
}
adev->gmc.mall_size = mall_size;
adev->gmc.m_half_use = half_use;
break;
default:
dev_err(adev->dev,

2
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

@ -301,6 +301,8 @@ struct amdgpu_gmc {
/* MALL size */
u64 mall_size;
uint32_t m_half_use;
/* number of UMC instances */
int num_umc;
/* mode2 save restore */

3
drivers/gpu/drm/amd/amdgpu/umc_v8_10.h

@ -33,7 +33,8 @@
/* Total channel instances for all available umc nodes */
#define UMC_V8_10_TOTAL_CHANNEL_NUM(adev) \
(UMC_V8_10_CHANNEL_INSTANCE_NUM * UMC_V8_10_UMC_INSTANCE_NUM * (adev)->gmc.num_umc)
(UMC_V8_10_CHANNEL_INSTANCE_NUM * UMC_V8_10_UMC_INSTANCE_NUM * \
(adev)->gmc.num_umc - hweight32((adev)->gmc.m_half_use) * 2)
/* UMC regiser per channel offset */
#define UMC_V8_10_PER_CHANNEL_OFFSET 0x400