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clk: samsung: exynos850: Register clocks early

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Some clocks must be registered before init calls. For example MCT clock
(from CMU_PERI) is needed for MCT timer driver, which is registered
with TIMER_OF_DECLARE(). By the time we get to core_initcall() used for
clk-exynos850 platform driver init, it's already too late. Inability to
get "mct" clock in MCT driver leads to kernel panic, as functions
registered with *_OF_DECLARE() can't do deferred calls. MCT timer driver
can't be fixed either, as it's acting as a clock source and it's
essential to register it in start_kernel() -> time_init().

Let's register CMU_PERI clocks early, using CLK_OF_DECLARE(). CMU_TOP
generates clocks needed for CMU_PERI, but it's already registered early.

While at it, let's cleanup the code a bit, by extracting everything
related to CMU initialization and registration to the separate function.

Similar issue was discussed at [1] and addressed in commit 1f7db7bbf031
("clk: renesas: cpg-mssr: Add early clock support"), as well as in
drivers/clk/mediatek/clk-mt2712.c.

[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20180829132954.64862-2-chris.brandt@renesas.com/

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211122144206.23134-1-semen.protsenko@linaro.org
This commit is contained in:
Sam Protsenko 2021-11-22 16:42:06 +02:00 committed by Sylwester Nawrocki
parent 6904d7e5d3
commit bcda841f9b
1 changed files with 49 additions and 21 deletions
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70
drivers/clk/samsung/clk-exynos850.c
View File

@ -60,6 +60,43 @@ static void __init exynos850_init_clocks(struct device_node *np,
iounmap(reg_base);
}
/**
* exynos850_register_cmu - Register specified Exynos850 CMU domain
* @dev: Device object; may be NULL if this function is not being
* called from platform driver probe function
* @np: CMU device tree node
* @cmu: CMU data
*
* Register specified CMU domain, which includes next steps:
*
* 1. Enable parent clock of @cmu CMU
* 2. Set initial registers configuration for @cmu CMU clocks
* 3. Register @cmu CMU clocks using Samsung clock framework API
*/
static void __init exynos850_register_cmu(struct device *dev,
struct device_node *np, const struct samsung_cmu_info *cmu)
{
/* Keep CMU parent clock running (needed for CMU registers access) */
if (cmu->clk_name) {
struct clk *parent_clk;
if (dev)
parent_clk = clk_get(dev, cmu->clk_name);
else
parent_clk = of_clk_get_by_name(np, cmu->clk_name);
if (IS_ERR(parent_clk)) {
pr_err("%s: could not find bus clock %s; err = %ld\n",
__func__, cmu->clk_name, PTR_ERR(parent_clk));
} else {
clk_prepare_enable(parent_clk);
}
}
exynos850_init_clocks(np, cmu->clk_regs, cmu->nr_clk_regs);
samsung_cmu_register_one(np, cmu);
}
/* ---- CMU_TOP ------------------------------------------------------------- */
/* Register Offset definitions for CMU_TOP (0x120e0000) */
@ -367,10 +404,10 @@ static const struct samsung_cmu_info top_cmu_info __initconst = {
static void __init exynos850_cmu_top_init(struct device_node *np)
{
exynos850_init_clocks(np, top_clk_regs, ARRAY_SIZE(top_clk_regs));
samsung_cmu_register_one(np, &top_cmu_info);
exynos850_register_cmu(NULL, np, &top_cmu_info);
}
/* Register CMU_TOP early, as it's a dependency for other early domains */
CLK_OF_DECLARE(exynos850_cmu_top, "samsung,exynos850-cmu-top",
exynos850_cmu_top_init);
@ -853,6 +890,15 @@ static const struct samsung_cmu_info peri_cmu_info __initconst = {
.clk_name = "dout_peri_bus",
};
static void __init exynos850_cmu_peri_init(struct device_node *np)
{
exynos850_register_cmu(NULL, np, &peri_cmu_info);
}
/* Register CMU_PERI early, as it's needed for MCT timer */
CLK_OF_DECLARE(exynos850_cmu_peri, "samsung,exynos850-cmu-peri",
exynos850_cmu_peri_init);
/* ---- CMU_CORE ------------------------------------------------------------ */
/* Register Offset definitions for CMU_CORE (0x12000000) */
@ -1021,24 +1067,9 @@ static int __init exynos850_cmu_probe(struct platform_device *pdev)
{
const struct samsung_cmu_info *info;
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
info = of_device_get_match_data(dev);
exynos850_init_clocks(np, info->clk_regs, info->nr_clk_regs);
samsung_cmu_register_one(np, info);
/* Keep bus clock running, so it's possible to access CMU registers */
if (info->clk_name) {
struct clk *bus_clk;
bus_clk = clk_get(dev, info->clk_name);
if (IS_ERR(bus_clk)) {
pr_err("%s: could not find bus clock %s; err = %ld\n",
__func__, info->clk_name, PTR_ERR(bus_clk));
} else {
clk_prepare_enable(bus_clk);
}
}
exynos850_register_cmu(dev, dev->of_node, info);
return 0;
}
@ -1053,9 +1084,6 @@ static const struct of_device_id exynos850_cmu_of_match[] = {
}, {
.compatible = "samsung,exynos850-cmu-hsi",
.data = &hsi_cmu_info,
}, {
.compatible = "samsung,exynos850-cmu-peri",
.data = &peri_cmu_info,
}, {
.compatible = "samsung,exynos850-cmu-core",
.data = &core_cmu_info,