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ASoC: SOF: Intel: hda-ctrl: add missing WAKE_STS clear

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For some reason, the programming sequences in the SOF driver do not
include a clear of the WAKE_STS bits before resetting the controller.

This clear is not formally required by the HDaudio specification, but
was added to harden the snd-hda-reset back in 2007. Adding this
sequence back avoids an issue reported by the Intel CI.

Closes: https://github.com/thesofproject/linux/issues/4889
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://msgid.link/r/20240404190357.138073-2-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Pierre-Louis Bossart 2024-04-04 14:03:54 -05:00 committed by Mark Brown
parent fe4a074542
commit bd5863f9ef
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GPG Key ID: 24D68B725D5487D0
1 changed files with 7 additions and 0 deletions
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7
sound/soc/sof/intel/hda-ctrl.c
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@ -184,6 +184,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev)
struct hdac_bus *bus = sof_to_bus(sdev);
struct hdac_stream *stream;
int sd_offset, ret = 0;
u32 gctl;
if (bus->chip_init)
return 0;
@ -192,6 +193,12 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev)
hda_dsp_ctrl_misc_clock_gating(sdev, false);
/* clear WAKE_STS if not in reset */
gctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL);
if (gctl & SOF_HDA_GCTL_RESET)
snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR,
SOF_HDA_WAKESTS, SOF_HDA_WAKESTS_INT_MASK);
/* reset HDA controller */
ret = hda_dsp_ctrl_link_reset(sdev, true);
if (ret < 0) {