drm/amdgpu/gmc: move invaliation bitmap setup to common code
So it can be shared with newer GMC versions. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -333,3 +333,43 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
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amdgpu_mmhub_ras_fini(adev);
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amdgpu_mmhub_ras_fini(adev);
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amdgpu_xgmi_ras_fini(adev);
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amdgpu_xgmi_ras_fini(adev);
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}
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}
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/*
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* The latest engine allocation on gfx9 is:
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* Engine 2, 3: firmware
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* Engine 0, 1, 4~16: amdgpu ring,
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* subject to change when ring number changes
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* Engine 17: Gart flushes
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*/
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#define GFXHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
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#define MMHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
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int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev)
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{
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struct amdgpu_ring *ring;
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unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] =
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{GFXHUB_FREE_VM_INV_ENGS_BITMAP, MMHUB_FREE_VM_INV_ENGS_BITMAP,
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GFXHUB_FREE_VM_INV_ENGS_BITMAP};
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unsigned i;
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unsigned vmhub, inv_eng;
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for (i = 0; i < adev->num_rings; ++i) {
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ring = adev->rings[i];
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vmhub = ring->funcs->vmhub;
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inv_eng = ffs(vm_inv_engs[vmhub]);
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if (!inv_eng) {
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dev_err(adev->dev, "no VM inv eng for ring %s\n",
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ring->name);
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return -EINVAL;
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}
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ring->vm_inv_eng = inv_eng - 1;
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vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);
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dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",
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ring->name, ring->vm_inv_eng, ring->funcs->vmhub);
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}
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return 0;
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}
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@ -267,5 +267,6 @@ bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev, uint64_t addr,
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uint16_t pasid, uint64_t timestamp);
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uint16_t pasid, uint64_t timestamp);
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int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev);
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int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev);
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void amdgpu_gmc_ras_fini(struct amdgpu_device *adev);
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void amdgpu_gmc_ras_fini(struct amdgpu_device *adev);
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int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev);
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#endif
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#endif
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@ -797,36 +797,6 @@ static bool gmc_v9_0_keep_stolen_memory(struct amdgpu_device *adev)
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}
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}
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}
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}
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static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev)
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{
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struct amdgpu_ring *ring;
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unsigned vm_inv_engs[AMDGPU_MAX_VMHUBS] =
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{GFXHUB_FREE_VM_INV_ENGS_BITMAP, MMHUB_FREE_VM_INV_ENGS_BITMAP,
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GFXHUB_FREE_VM_INV_ENGS_BITMAP};
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unsigned i;
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unsigned vmhub, inv_eng;
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for (i = 0; i < adev->num_rings; ++i) {
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ring = adev->rings[i];
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vmhub = ring->funcs->vmhub;
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inv_eng = ffs(vm_inv_engs[vmhub]);
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if (!inv_eng) {
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dev_err(adev->dev, "no VM inv eng for ring %s\n",
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ring->name);
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return -EINVAL;
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}
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ring->vm_inv_eng = inv_eng - 1;
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vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng);
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dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n",
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ring->name, ring->vm_inv_eng, ring->funcs->vmhub);
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}
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return 0;
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}
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static int gmc_v9_0_late_init(void *handle)
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static int gmc_v9_0_late_init(void *handle)
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{
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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@ -835,7 +805,7 @@ static int gmc_v9_0_late_init(void *handle)
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if (!gmc_v9_0_keep_stolen_memory(adev))
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if (!gmc_v9_0_keep_stolen_memory(adev))
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amdgpu_bo_late_init(adev);
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amdgpu_bo_late_init(adev);
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r = gmc_v9_0_allocate_vm_inv_eng(adev);
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r = amdgpu_gmc_allocate_vm_inv_eng(adev);
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if (r)
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if (r)
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return r;
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return r;
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/* Check if ecc is available */
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/* Check if ecc is available */
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@ -24,16 +24,6 @@
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#ifndef __GMC_V9_0_H__
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#ifndef __GMC_V9_0_H__
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#define __GMC_V9_0_H__
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#define __GMC_V9_0_H__
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/*
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* The latest engine allocation on gfx9 is:
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* Engine 2, 3: firmware
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* Engine 0, 1, 4~16: amdgpu ring,
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* subject to change when ring number changes
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* Engine 17: Gart flushes
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*/
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#define GFXHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
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#define MMHUB_FREE_VM_INV_ENGS_BITMAP 0x1FFF3
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extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
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extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
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extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
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extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
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#endif
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#endif
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