drm/amd/pm: add new data in metrics table
Export new data in the metrics table for gfx and memory utilization counter, and each hbm temperature as well. v2: change the metrics table version to v1.1 v3: fix the coding style v4: rebase against latest kernel Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -231,6 +231,8 @@ enum pp_df_cstate {
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#define XGMI_MODE_PSTATE_D3 0
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#define XGMI_MODE_PSTATE_D0 1
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#define NUM_HBM_INSTANCES 4
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struct seq_file;
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enum amd_pp_clock_type;
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struct amd_pp_simple_clock_info;
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@ -449,6 +451,11 @@ struct gpu_metrics_v1_1 {
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uint16_t pcie_link_speed; // in 0.1 GT/s
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uint16_t padding;
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uint32_t gfx_activity_acc;
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uint32_t mem_activity_acc;
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uint16_t temperature_hbm[NUM_HBM_INSTANCES];
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};
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/*
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@ -265,8 +265,6 @@ int smu_v13_0_get_current_pcie_link_speed_level(struct smu_context *smu);
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int smu_v13_0_get_current_pcie_link_speed(struct smu_context *smu);
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void smu_v13_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics);
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int smu_v13_0_gfx_ulv_control(struct smu_context *smu,
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bool enablement);
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@ -1296,10 +1296,10 @@ static ssize_t aldebaran_get_gpu_metrics(struct smu_context *smu,
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void **table)
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{
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struct smu_table_context *smu_table = &smu->smu_table;
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struct gpu_metrics_v1_0 *gpu_metrics =
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(struct gpu_metrics_v1_0 *)smu_table->gpu_metrics_table;
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struct gpu_metrics_v1_1 *gpu_metrics =
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(struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
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SmuMetrics_t metrics;
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int ret = 0;
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int i, ret = 0;
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ret = smu_cmn_get_metrics_table(smu,
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&metrics,
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@ -1307,7 +1307,7 @@ static ssize_t aldebaran_get_gpu_metrics(struct smu_context *smu,
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if (ret)
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return ret;
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smu_v13_0_init_gpu_metrics_v1_0(gpu_metrics);
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smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
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gpu_metrics->temperature_edge = metrics.TemperatureEdge;
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gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
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@ -1318,12 +1318,16 @@ static ssize_t aldebaran_get_gpu_metrics(struct smu_context *smu,
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gpu_metrics->average_gfx_activity = metrics.AverageGfxActivity;
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gpu_metrics->average_umc_activity = metrics.AverageUclkActivity;
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gpu_metrics->average_mm_activity = 0;
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gpu_metrics->average_socket_power = metrics.AverageSocketPower;
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gpu_metrics->energy_accumulator = 0;
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gpu_metrics->average_gfxclk_frequency = metrics.AverageGfxclkFrequency;
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gpu_metrics->average_socclk_frequency = metrics.AverageSocclkFrequency;
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gpu_metrics->average_uclk_frequency = metrics.AverageUclkFrequency;
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gpu_metrics->average_vclk0_frequency = 0;
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gpu_metrics->average_dclk0_frequency = 0;
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gpu_metrics->current_gfxclk = metrics.CurrClock[PPCLK_GFXCLK];
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gpu_metrics->current_socclk = metrics.CurrClock[PPCLK_SOCCLK];
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@ -1333,14 +1337,24 @@ static ssize_t aldebaran_get_gpu_metrics(struct smu_context *smu,
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gpu_metrics->throttle_status = metrics.ThrottlerStatus;
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gpu_metrics->current_fan_speed = 0;
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gpu_metrics->pcie_link_width =
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smu_v13_0_get_current_pcie_link_width(smu);
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gpu_metrics->pcie_link_speed =
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aldebaran_get_current_pcie_link_speed(smu);
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gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
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gpu_metrics->gfx_activity_acc = metrics.GfxBusyAcc;
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gpu_metrics->mem_activity_acc = metrics.DramBusyAcc;
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for (i = 0; i < NUM_HBM_INSTANCES; i++)
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gpu_metrics->temperature_hbm[i] = metrics.TemperatureAllHBM[i];
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*table = (void *)gpu_metrics;
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return sizeof(struct gpu_metrics_v1_0);
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return sizeof(struct gpu_metrics_v1_1);
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}
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static bool aldebaran_is_mode1_reset_supported(struct smu_context *smu)
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@ -1809,14 +1809,3 @@ int smu_v13_0_get_current_pcie_link_speed(struct smu_context *smu)
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return link_speed[speed_level];
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}
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void smu_v13_0_init_gpu_metrics_v1_0(struct gpu_metrics_v1_0 *gpu_metrics)
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{
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memset(gpu_metrics, 0xFF, sizeof(struct gpu_metrics_v1_0));
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gpu_metrics->common_header.structure_size =
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sizeof(struct gpu_metrics_v1_0);
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gpu_metrics->common_header.format_revision = 1;
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gpu_metrics->common_header.content_revision = 0;
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gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
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}
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